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target/mips: Clean up handling of CP0 register 8

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Clean up handling of CP0 register 8.

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1567009614-12438-10-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
Aleksandar Markovic 2019-08-28 18:26:33 +02:00
parent 143a9875e5
commit 67d167d2d8
2 changed files with 17 additions and 16 deletions
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1
target/mips/cpu.h
View File

@ -333,6 +333,7 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG08__BADVADDR 0
#define CP0_REG08__BADINSTR 1
#define CP0_REG08__BADINSTRP 2
#define CP0_REG08__BADINSTRX 3
/* CP0 Register 09 */
#define CP0_REG09__COUNT 0
#define CP0_REG09__SAARI 6

32
target/mips/translate.c
View File

@ -7097,22 +7097,22 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
case 0:
case CP0_REG08__BADVADDR:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
tcg_gen_ext32s_tl(arg, arg);
register_name = "BadVAddr";
break;
case 1:
case CP0_REG08__BADINSTR:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr));
register_name = "BadInstr";
break;
case 2:
case CP0_REG08__BADINSTRP:
CP0_CHECK(ctx->bp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
register_name = "BadInstrP";
break;
case 3:
case CP0_REG08__BADINSTRX:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
tcg_gen_andi_tl(arg, arg, ~0xffff);
@ -7830,19 +7830,19 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
case 0:
case CP0_REG08__BADVADDR:
/* ignored */
register_name = "BadVAddr";
break;
case 1:
case CP0_REG08__BADINSTR:
/* ignored */
register_name = "BadInstr";
break;
case 2:
case CP0_REG08__BADINSTRP:
/* ignored */
register_name = "BadInstrP";
break;
case 3:
case CP0_REG08__BADINSTRX:
/* ignored */
register_name = "BadInstrX";
break;
@ -8574,21 +8574,21 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
case 0:
case CP0_REG08__BADVADDR:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
register_name = "BadVAddr";
break;
case 1:
case CP0_REG08__BADINSTR:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstr));
register_name = "BadInstr";
break;
case 2:
case CP0_REG08__BADINSTRP:
CP0_CHECK(ctx->bp);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrP));
register_name = "BadInstrP";
break;
case 3:
case CP0_REG08__BADINSTRX:
CP0_CHECK(ctx->bi);
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_BadInstrX));
tcg_gen_andi_tl(arg, arg, ~0xffff);
@ -9289,19 +9289,19 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_08:
switch (sel) {
case 0:
case CP0_REG08__BADVADDR:
/* ignored */
register_name = "BadVAddr";
break;
case 1:
case CP0_REG08__BADINSTR:
/* ignored */
register_name = "BadInstr";
break;
case 2:
case CP0_REG08__BADINSTRP:
/* ignored */
register_name = "BadInstrP";
break;
case 3:
case CP0_REG08__BADINSTRX:
/* ignored */
register_name = "BadInstrX";
break;