cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc()
The function cpu_resume_from_signal() is now always called with a NULL puc argument, and is rather misnamed since it is never called from a signal handler. It is essentially forcing an exit to the top level cpu loop but without raising any exception, so rename it to cpu_loop_exit_noexc() and drop the useless unused argument. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Riku Voipio <riku.voipio@linaro.org> Message-id: 1463494687-25947-4-git-send-email-peter.maydell@linaro.org
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@ -26,10 +26,8 @@
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bool exit_request;
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CPUState *tcg_current_cpu;
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/* exit the current TB from a signal handler. The host registers are
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restored in a state compatible with the CPU emulator
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*/
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void cpu_resume_from_signal(CPUState *cpu, void *puc)
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/* exit the current TB, but without causing any exception to be raised */
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void cpu_loop_exit_noexc(CPUState *cpu)
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{
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/* XXX: restore cpu registers saved in host registers */
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2
exec.c
2
exec.c
@ -2091,7 +2091,7 @@ static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags)
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} else {
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cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
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tb_gen_code(cpu, pc, cs_base, cpu_flags, 1);
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cpu_resume_from_signal(cpu, NULL);
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cpu_loop_exit_noexc(cpu);
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}
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}
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} else {
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@ -450,7 +450,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
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if (!kvm_enabled()) {
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tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);
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cpu_resume_from_signal(cs, NULL);
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cpu_loop_exit_noexc(cs);
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}
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}
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@ -50,7 +50,7 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
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void cpu_gen_init(void);
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bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
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void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc);
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void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
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void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
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TranslationBlock *tb_gen_code(CPUState *cpu,
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target_ulong pc, target_ulong cs_base,
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@ -218,7 +218,7 @@ void breakpoint_handler(CPUState *cs)
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if (check_hw_breakpoints(env, false)) {
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raise_exception(env, EXCP01_DB);
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} else {
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cpu_resume_from_signal(cs, NULL);
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cpu_loop_exit_noexc(cs);
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}
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}
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} else {
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@ -141,7 +141,7 @@ void lm32_debug_excp_handler(CPUState *cs)
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if (check_watchpoints(env)) {
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raise_exception(env, EXCP_WATCHPOINT);
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} else {
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cpu_resume_from_signal(cs, NULL);
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cpu_loop_exit_noexc(cs);
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}
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}
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} else {
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@ -688,7 +688,7 @@ void s390x_cpu_debug_excp_handler(CPUState *cs)
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will be triggered, it will call load_psw which will recompute
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the watchpoints. */
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cpu_watchpoint_remove_all(cs, BP_CPU);
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cpu_resume_from_signal(cs, NULL);
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cpu_loop_exit_noexc(cs);
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}
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}
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#endif /* CONFIG_USER_ONLY */
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@ -108,7 +108,7 @@ void xtensa_breakpoint_handler(CPUState *cs)
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if (cause) {
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debug_exception_env(env, cause);
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}
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cpu_resume_from_signal(cs, NULL);
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cpu_loop_exit_noexc(cs);
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}
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}
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}
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@ -1395,7 +1395,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
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modifying the memory. It will ensure that it cannot modify
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itself */
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tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
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cpu_resume_from_signal(cpu, NULL);
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cpu_loop_exit_noexc(cpu);
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}
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#endif
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}
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@ -1654,7 +1654,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
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repeating the fault, which is horribly inefficient.
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Better would be to execute just this insn uncached, or generate a
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second new TB. */
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cpu_resume_from_signal(cpu, NULL);
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cpu_loop_exit_noexc(cpu);
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}
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void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
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@ -74,7 +74,7 @@ static void cpu_exit_tb_from_sighandler(CPUState *cpu, void *puc)
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sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL);
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#endif
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cpu_resume_from_signal(cpu, NULL);
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cpu_loop_exit_noexc(cpu);
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}
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/* 'pc' is the host PC at which the exception was raised. 'address' is
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