From 68a5827b80117973714455c5aa16063ad1ffacb9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Thu, 15 Feb 2024 11:30:43 +0000 Subject: [PATCH] hw/arm/xilinx_zynq: Wire FIQ between CPU <> GIC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Similarly to commits dadbb58f59..5ae79fe825 for other ARM boards, connect FIQ output of the GIC CPU interfaces to the CPU. Signed-off-by: Philippe Mathieu-Daudé Message-id: 20240130152548.17855-1-philmd@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/xilinx_zynq.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index a41a118346..fc3abcbe88 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -243,6 +243,8 @@ static void zynq_init(MachineState *machine) sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); + sysbus_connect_irq(busdev, 1, + qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ)); for (n = 0; n < 64; n++) { pic[n] = qdev_get_gpio_in(dev, n);