reduced irq latency
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@296 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
c9159e5321
commit
68a7931591
@ -309,6 +309,10 @@ void page_unprotect_range(uint8_t *data, unsigned long data_size);
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void cpu_abort(CPUState *env, const char *fmt, ...);
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extern CPUState *cpu_single_env;
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#define CPU_INTERRUPT_EXIT 0x01 /* wants exit from main loop */
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#define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */
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void cpu_interrupt(CPUX86State *s, int mask);
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/* gdb stub API */
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extern int gdbstub_fd;
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CPUState *cpu_gdbstub_get_env(void *opaque);
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43
cpu-exec.c
43
cpu-exec.c
@ -71,7 +71,7 @@ int cpu_exec(CPUState *env1)
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#ifdef __sparc__
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int saved_i7, tmp_T0;
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#endif
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int code_gen_size, ret;
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int code_gen_size, ret, interrupt_request;
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void (*gen_func)(void);
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TranslationBlock *tb, **ptb;
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uint8_t *tc_ptr, *cs_base, *pc;
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@ -139,7 +139,6 @@ int cpu_exec(CPUState *env1)
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#else
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#error unsupported target CPU
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#endif
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env->interrupt_request = 0;
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env->exception_index = -1;
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/* prepare setjmp context for exception handling */
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@ -176,28 +175,32 @@ int cpu_exec(CPUState *env1)
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}
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env->exception_index = -1;
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}
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#if defined(TARGET_I386)
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/* if hardware interrupt pending, we execute it */
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if (env->hard_interrupt_request &&
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(env->eflags & IF_MASK)) {
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int intno;
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intno = cpu_x86_get_pic_interrupt(env);
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if (loglevel) {
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fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno);
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}
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do_interrupt(intno, 0, 0, 0);
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env->hard_interrupt_request = 0;
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}
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#endif
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T0 = 0; /* force lookup of first TB */
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for(;;) {
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#ifdef __sparc__
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/* g1 can be modified by some libc? functions */
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tmp_T0 = T0;
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#endif
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if (env->interrupt_request) {
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env->exception_index = EXCP_INTERRUPT;
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cpu_loop_exit();
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interrupt_request = env->interrupt_request;
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if (interrupt_request) {
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#if defined(TARGET_I386)
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/* if hardware interrupt pending, we execute it */
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if ((interrupt_request & CPU_INTERRUPT_HARD) &&
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(env->eflags & IF_MASK)) {
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int intno;
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intno = cpu_x86_get_pic_interrupt(env);
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if (loglevel) {
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fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno);
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}
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do_interrupt(intno, 0, 0, 0);
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env->interrupt_request &= ~CPU_INTERRUPT_HARD;
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}
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#endif
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if (interrupt_request & CPU_INTERRUPT_EXIT) {
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env->interrupt_request &= ~CPU_INTERRUPT_EXIT;
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env->exception_index = EXCP_INTERRUPT;
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cpu_loop_exit();
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}
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}
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#ifdef DEBUG_EXEC
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if (loglevel) {
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@ -212,7 +215,7 @@ int cpu_exec(CPUState *env1)
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env->regs[R_EBP] = EBP;
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env->regs[R_ESP] = ESP;
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env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
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cpu_x86_dump_state(env, logfile, 0);
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cpu_x86_dump_state(env, logfile, X86_DUMP_CCOP);
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env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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#elif defined(TARGET_ARM)
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cpu_arm_dump_state(env, logfile, 0);
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@ -454,7 +457,7 @@ static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
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{
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TranslationBlock *tb;
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int ret;
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if (cpu_single_env)
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env = cpu_single_env; /* XXX: find a correct solution for multithread */
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#if defined(DEBUG_SIGNAL)
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@ -254,10 +254,7 @@ typedef struct CPUX86State {
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struct TranslationBlock *current_tb; /* currently executing TB */
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uint32_t cr[5]; /* NOTE: cr1 is unused */
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uint32_t dr[8]; /* debug registers */
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int interrupt_request; /* if true, will exit from cpu_exec() ASAP */
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/* if true, will call cpu_x86_get_pic_interrupt() ASAP to get the
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request interrupt number */
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int hard_interrupt_request;
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int interrupt_request;
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int user_mode_only; /* user mode only simulation */
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/* user data */
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@ -275,7 +272,6 @@ int cpu_x86_inl(CPUX86State *env, int addr);
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CPUX86State *cpu_x86_init(void);
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int cpu_x86_exec(CPUX86State *s);
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void cpu_x86_interrupt(CPUX86State *s);
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void cpu_x86_close(CPUX86State *s);
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int cpu_x86_get_pic_interrupt(CPUX86State *s);
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7
exec.c
7
exec.c
@ -617,11 +617,12 @@ static void tb_reset_jump_recursive(TranslationBlock *tb)
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tb_reset_jump_recursive2(tb, 1);
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}
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void cpu_interrupt(CPUState *env)
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/* mask must never be zero */
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void cpu_interrupt(CPUState *env, int mask)
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{
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TranslationBlock *tb;
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env->interrupt_request = 1;
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env->interrupt_request |= mask;
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/* if the cpu is currently executing code, we must unlink it and
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all the potentially executing TB */
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tb = env->current_tb;
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@ -333,7 +333,7 @@ static void host_signal_handler(int host_signum, siginfo_t *info,
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host_to_target_siginfo_noswap(&tinfo, info);
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if (queue_signal(sig, &tinfo) == 1) {
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/* interrupt the virtual CPU as soon as possible */
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cpu_interrupt(global_env);
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cpu_interrupt(global_env, CPU_INTERRUPT_EXIT);
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}
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}
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@ -3331,12 +3331,14 @@ long disas_insn(DisasContext *s, uint8_t *pc_start)
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if (!s->vm86) {
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if (s->cpl <= s->iopl) {
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gen_op_sti();
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s->is_jmp = 2; /* give a chance to handle pending irqs */
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} else {
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gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
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}
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} else {
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if (s->iopl == 3) {
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gen_op_sti();
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s->is_jmp = 2; /* give a chance to handle pending irqs */
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} else {
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gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
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}
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