target/tricore: Convert to CPUClass::tlb_fill
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -166,6 +166,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
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cc->synchronize_from_tb = tricore_cpu_synchronize_from_tb;
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cc->get_phys_page_attrs_debug = tricore_cpu_get_phys_page_attrs_debug;
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cc->tcg_initialize = tricore_tcg_init;
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cc->tlb_fill = tricore_cpu_tlb_fill;
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}
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#define DEFINE_TRICORE_CPU_TYPE(cpu_model, initfn) \
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@ -417,8 +417,8 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState *env, target_ulong *pc,
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#define CPU_RESOLVING_TYPE TYPE_TRICORE_CPU
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/* helpers.c */
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int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address,
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int rw, int mmu_idx);
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#define cpu_handle_mmu_fault cpu_tricore_handle_mmu_fault
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bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#endif /* TRICORE_CPU_H */
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@ -50,8 +50,9 @@ static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,
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{
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}
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int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
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int rw, int mmu_idx)
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bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType rw, int mmu_idx,
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bool probe, uintptr_t retaddr)
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{
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TriCoreCPU *cpu = TRICORE_CPU(cs);
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CPUTriCoreState *env = &cpu->env;
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@ -64,20 +65,30 @@ int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address,
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access_type = ACCESS_INT;
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ret = get_physical_address(env, &physical, &prot,
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address, rw, access_type);
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qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx
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" prot %d\n", __func__, address, ret, physical, prot);
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qemu_log_mask(CPU_LOG_MMU, "%s address=" TARGET_FMT_lx " ret %d physical "
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TARGET_FMT_plx " prot %d\n",
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__func__, (target_ulong)address, ret, physical, prot);
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if (ret == TLBRET_MATCH) {
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tlb_set_page(cs, address & TARGET_PAGE_MASK,
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physical & TARGET_PAGE_MASK, prot | PAGE_EXEC,
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mmu_idx, TARGET_PAGE_SIZE);
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ret = 0;
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} else if (ret < 0) {
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return true;
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} else {
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assert(ret < 0);
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if (probe) {
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return false;
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}
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raise_mmu_exception(env, address, rw, ret);
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ret = 1;
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cpu_loop_exit_restore(cs, retaddr);
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}
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}
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return ret;
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void tlb_fill(CPUState *cs, target_ulong addr, int size,
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MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
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{
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tricore_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
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}
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static void tricore_cpu_list_entry(gpointer data, gpointer user_data)
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@ -2793,29 +2793,3 @@ uint32_t helper_psw_read(CPUTriCoreState *env)
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{
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return psw_read(env);
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}
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static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env,
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uint32_t exception,
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int error_code,
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uintptr_t pc)
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{
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CPUState *cs = CPU(tricore_env_get_cpu(env));
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cs->exception_index = exception;
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env->error_code = error_code;
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/* now we have a real cpu fault */
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cpu_loop_exit_restore(cs, pc);
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}
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void tlb_fill(CPUState *cs, target_ulong addr, int size,
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MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
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{
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int ret;
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ret = cpu_tricore_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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if (ret) {
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TriCoreCPU *cpu = TRICORE_CPU(cs);
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CPUTriCoreState *env = &cpu->env;
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do_raise_exception_err(env, cs->exception_index,
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env->error_code, retaddr);
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}
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}
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