From 6925f12f4f02e55c73e738cb9e91e8cda2f23358 Mon Sep 17 00:00:00 2001 From: Suraj Jitindar Singh Date: Fri, 13 Jan 2017 17:28:23 +1100 Subject: [PATCH] target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation We are calculating the authority mask register key value wrong. The pte entry contains the key value with the two upper bits and the three lower bits stored separately. We should use these two portions to get a 5 bit value, not or them together which will only give us a 3 bit value. Fix this. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson --- target/ppc/mmu-hash64.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index ab5d347a53..7a0b7fca41 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -85,7 +85,7 @@ void ppc_hash64_update_rmls(CPUPPCState *env); #define HPTE64_R_C 0x0000000000000080ULL #define HPTE64_R_R 0x0000000000000100ULL #define HPTE64_R_KEY_LO 0x0000000000000e00ULL -#define HPTE64_R_KEY(x) ((((x) & HPTE64_R_KEY_HI) >> 60) | \ +#define HPTE64_R_KEY(x) ((((x) & HPTE64_R_KEY_HI) >> 57) | \ (((x) & HPTE64_R_KEY_LO) >> 9)) #define HPTE64_V_1TB_SEG 0x4000000000000000ULL