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target/m68k: Check for USER_ONLY definition instead of SOFTMMU one

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Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.

Invert some if() ladders for clarity.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230613133347.82210-4-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-06-13 15:33:41 +02:00 committed by Richard Henderson
parent 66352d7ef2
commit 6a14058677
4 changed files with 23 additions and 25 deletions
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14
target/m68k/cpu.c
View File

@ -80,10 +80,10 @@ static void m68k_cpu_reset_hold(Object *obj)
}
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
#ifdef CONFIG_SOFTMMU
cpu_m68k_set_sr(env, SR_S | SR_I);
#else
#ifdef CONFIG_USER_ONLY
cpu_m68k_set_sr(env, 0);
#else
cpu_m68k_set_sr(env, SR_S | SR_I);
#endif
for (i = 0; i < 8; i++) {
env->fregs[i].d = nan;
@ -334,7 +334,7 @@ static void m68k_cpu_initfn(Object *obj)
cpu_set_cpustate_pointers(cpu);
}
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
static bool fpu_needed(void *opaque)
{
M68kCPU *s = opaque;
@ -525,15 +525,13 @@ static const VMStateDescription vmstate_m68k_cpu = {
NULL
},
};
#endif
#ifndef CONFIG_USER_ONLY
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps m68k_sysemu_ops = {
.get_phys_page_debug = m68k_cpu_get_phys_page_debug,
};
#endif
#endif /* !CONFIG_USER_ONLY */
#include "hw/core/tcg-cpu-ops.h"
@ -568,7 +566,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
cc->get_pc = m68k_cpu_get_pc;
cc->gdb_read_register = m68k_cpu_gdb_read_register;
cc->gdb_write_register = m68k_cpu_gdb_write_register;
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
dc->vmsd = &vmstate_m68k_cpu;
cc->sysemu_ops = &m68k_sysemu_ops;
#endif

4
target/m68k/helper.c
View File

@ -1480,7 +1480,7 @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
env->macc[acc + 1] = res;
}
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
{
hwaddr physical;
@ -1534,4 +1534,4 @@ void HELPER(reset)(CPUM68KState *env)
{
/* FIXME: reset all except CPU */
}
#endif
#endif /* !CONFIG_USER_ONLY */

2
target/m68k/helper.h
View File

@ -124,7 +124,7 @@ DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
DEF_HELPER_3(chk, void, env, s32, s32)
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
DEF_HELPER_3(ptest, void, env, i32, i32)
DEF_HELPER_3(pflush, void, env, i32, i32)
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)

28
target/m68k/translate.c
View File

@ -2637,10 +2637,10 @@ DISAS_INSN(swap)
DISAS_INSN(bkpt)
{
#if defined(CONFIG_SOFTMMU)
gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
#else
#if defined(CONFIG_USER_ONLY)
gen_exception(s, s->base.pc_next, EXCP_DEBUG);
#else
gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
#endif
}
@ -2838,7 +2838,7 @@ DISAS_INSN(unlk)
tcg_gen_addi_i32(QREG_SP, src, 4);
}
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(reset)
{
if (IS_USER(s)) {
@ -4398,7 +4398,7 @@ DISAS_INSN(move_from_sr)
DEST_EA(env, insn, OS_WORD, sr, NULL);
}
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(moves)
{
int opsize;
@ -4605,7 +4605,7 @@ DISAS_INSN(cinv)
/* Invalidate cache line. Implement as no-op. */
}
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(pflush)
{
TCGv opmode;
@ -5352,7 +5352,7 @@ DISAS_INSN(ftrapcc)
do_trapcc(s, &c);
}
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
DISAS_INSN(frestore)
{
TCGv addr;
@ -5795,7 +5795,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(bitop_im, 08c0, ffc0);
INSN(arith_im, 0a80, fff8, CF_ISA_A);
INSN(arith_im, 0a00, ff00, M68K);
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
INSN(moves, 0e00, ff00, M68K);
#endif
INSN(cas, 0ac0, ffc0, CAS);
@ -5824,7 +5824,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(move_to_ccr, 44c0, ffc0);
INSN(not, 4680, fff8, CF_ISA_A);
INSN(not, 4600, ff00, M68K);
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
BASE(move_to_sr, 46c0, ffc0);
#endif
INSN(nbcd, 4800, ffc0, M68K);
@ -5841,7 +5841,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(tst, 4a00, ff00);
INSN(tas, 4ac0, ffc0, CF_ISA_B);
INSN(tas, 4ac0, ffc0, M68K);
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
INSN(halt, 4ac8, ffff, CF_ISA_A);
INSN(halt, 4ac8, ffff, M68K);
#endif
@ -5855,7 +5855,7 @@ void register_m68k_insns (CPUM68KState *env)
BASE(trap, 4e40, fff0);
BASE(link, 4e50, fff8);
BASE(unlk, 4e58, fff8);
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
INSN(move_to_usp, 4e60, fff8, USP);
INSN(move_from_usp, 4e68, fff8, USP);
INSN(reset, 4e70, ffff, M68K);
@ -5980,7 +5980,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */
INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */
INSN(fbcc, f280, ff80, FPU);
#if defined(CONFIG_SOFTMMU)
#if !defined(CONFIG_USER_ONLY)
INSN(frestore, f340, ffc0, CF_FPU);
INSN(fsave, f300, ffc0, CF_FPU);
INSN(frestore, f340, ffc0, FPU);
@ -6190,7 +6190,7 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
break;
}
qemu_fprintf(f, "\n");
#ifdef CONFIG_SOFTMMU
#ifndef CONFIG_USER_ONLY
qemu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n",
env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP],
env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP],
@ -6204,5 +6204,5 @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]);
qemu_fprintf(f, "MMUSR %08x, fault at %08x\n",
env->mmu.mmusr, env->mmu.ar);
#endif
#endif /* !CONFIG_USER_ONLY */
}