i386: Remove REGPARM
Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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361dea401f
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6a18ae2d29
6
osdep.h
6
osdep.h
@ -70,12 +70,6 @@
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#define inline always_inline
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#endif
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#ifdef __i386__
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#define REGPARM __attribute((regparm(3)))
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#else
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#define REGPARM
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#endif
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#define qemu_printf printf
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int qemu_daemon(int nochdir, int noclose);
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@ -9,22 +9,22 @@
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#ifndef SOFTMMU_DEFS_H
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#define SOFTMMU_DEFS_H
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uint8_t REGPARM __ldb_mmu(target_ulong addr, int mmu_idx);
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void REGPARM __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx);
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uint16_t REGPARM __ldw_mmu(target_ulong addr, int mmu_idx);
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void REGPARM __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx);
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uint32_t REGPARM __ldl_mmu(target_ulong addr, int mmu_idx);
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void REGPARM __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx);
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uint64_t REGPARM __ldq_mmu(target_ulong addr, int mmu_idx);
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void REGPARM __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx);
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uint8_t __ldb_mmu(target_ulong addr, int mmu_idx);
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void __stb_mmu(target_ulong addr, uint8_t val, int mmu_idx);
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uint16_t __ldw_mmu(target_ulong addr, int mmu_idx);
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void __stw_mmu(target_ulong addr, uint16_t val, int mmu_idx);
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uint32_t __ldl_mmu(target_ulong addr, int mmu_idx);
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void __stl_mmu(target_ulong addr, uint32_t val, int mmu_idx);
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uint64_t __ldq_mmu(target_ulong addr, int mmu_idx);
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void __stq_mmu(target_ulong addr, uint64_t val, int mmu_idx);
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uint8_t REGPARM __ldb_cmmu(target_ulong addr, int mmu_idx);
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void REGPARM __stb_cmmu(target_ulong addr, uint8_t val, int mmu_idx);
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uint16_t REGPARM __ldw_cmmu(target_ulong addr, int mmu_idx);
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void REGPARM __stw_cmmu(target_ulong addr, uint16_t val, int mmu_idx);
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uint32_t REGPARM __ldl_cmmu(target_ulong addr, int mmu_idx);
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void REGPARM __stl_cmmu(target_ulong addr, uint32_t val, int mmu_idx);
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uint64_t REGPARM __ldq_cmmu(target_ulong addr, int mmu_idx);
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void REGPARM __stq_cmmu(target_ulong addr, uint64_t val, int mmu_idx);
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uint8_t __ldb_cmmu(target_ulong addr, int mmu_idx);
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void __stb_cmmu(target_ulong addr, uint8_t val, int mmu_idx);
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uint16_t __ldw_cmmu(target_ulong addr, int mmu_idx);
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void __stw_cmmu(target_ulong addr, uint16_t val, int mmu_idx);
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uint32_t __ldl_cmmu(target_ulong addr, int mmu_idx);
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void __stl_cmmu(target_ulong addr, uint32_t val, int mmu_idx);
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uint64_t __ldq_cmmu(target_ulong addr, int mmu_idx);
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void __stq_cmmu(target_ulong addr, uint64_t val, int mmu_idx);
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#endif
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@ -89,8 +89,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
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}
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/* handle all cases except unaligned access which span two pages */
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DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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int mmu_idx)
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DATA_TYPE glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, int mmu_idx)
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{
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DATA_TYPE res;
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int index;
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@ -232,8 +231,7 @@ static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,
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#endif /* SHIFT > 2 */
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}
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void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
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DATA_TYPE val,
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void glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE val,
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int mmu_idx)
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{
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target_phys_addr_t ioaddr;
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@ -116,17 +116,7 @@ static inline int tcg_target_get_call_iarg_regs_count(int flags)
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return 6;
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}
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flags &= TCG_CALL_TYPE_MASK;
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switch(flags) {
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case TCG_CALL_TYPE_STD:
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return 0;
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case TCG_CALL_TYPE_REGPARM_1:
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case TCG_CALL_TYPE_REGPARM_2:
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case TCG_CALL_TYPE_REGPARM:
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return flags - TCG_CALL_TYPE_REGPARM_1 + 1;
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default:
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tcg_abort();
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}
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}
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/* parse target specific constraints */
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@ -1148,7 +1138,12 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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int data_reg, data_reg2 = 0;
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int addrlo_idx;
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#if defined(CONFIG_SOFTMMU)
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int mem_index, s_bits, arg_idx;
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int mem_index, s_bits;
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#if TCG_TARGET_REG_BITS == 64
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int arg_idx;
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#else
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int stack_adjust;
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#endif
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uint8_t *label_ptr[3];
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#endif
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@ -1184,16 +1179,33 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
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}
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/* XXX: move that code at the end of the TB */
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#if TCG_TARGET_REG_BITS == 32
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tcg_out_pushi(s, mem_index);
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stack_adjust = 4;
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if (TARGET_LONG_BITS == 64) {
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tcg_out_push(s, args[addrlo_idx + 1]);
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stack_adjust += 4;
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}
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tcg_out_push(s, args[addrlo_idx]);
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stack_adjust += 4;
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#else
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/* The first argument is already loaded with addrlo. */
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arg_idx = 1;
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if (TCG_TARGET_REG_BITS == 32 && TARGET_LONG_BITS == 64) {
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tcg_out_mov(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[arg_idx++],
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args[addrlo_idx + 1]);
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}
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tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[arg_idx],
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mem_index);
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#endif
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tcg_out_calli(s, (tcg_target_long)qemu_ld_helpers[s_bits]);
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#if TCG_TARGET_REG_BITS == 32
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if (stack_adjust == (TCG_TARGET_REG_BITS / 8)) {
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/* Pop and discard. This is 2 bytes smaller than the add. */
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tcg_out_pop(s, TCG_REG_ECX);
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} else if (stack_adjust != 0) {
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tcg_out_addi(s, TCG_REG_CALL_STACK, stack_adjust);
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}
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#endif
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switch(opc) {
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case 0 | 4:
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tcg_out_ext8s(s, data_reg, TCG_REG_EAX, P_REXW);
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@ -1359,45 +1371,27 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
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}
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/* XXX: move that code at the end of the TB */
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if (TCG_TARGET_REG_BITS == 64) {
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#if TCG_TARGET_REG_BITS == 32
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tcg_out_pushi(s, mem_index);
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stack_adjust = 4;
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if (opc == 3) {
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tcg_out_push(s, data_reg2);
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stack_adjust += 4;
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}
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tcg_out_push(s, data_reg);
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stack_adjust += 4;
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if (TARGET_LONG_BITS == 64) {
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tcg_out_push(s, args[addrlo_idx + 1]);
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stack_adjust += 4;
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}
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tcg_out_push(s, args[addrlo_idx]);
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stack_adjust += 4;
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#else
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tcg_out_mov(s, (opc == 3 ? TCG_TYPE_I64 : TCG_TYPE_I32),
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TCG_REG_RSI, data_reg);
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
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stack_adjust = 0;
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} else if (TARGET_LONG_BITS == 32) {
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tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, data_reg);
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if (opc == 3) {
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tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_ECX, data_reg2);
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tcg_out_pushi(s, mem_index);
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stack_adjust = 4;
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} else {
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
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stack_adjust = 0;
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}
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} else {
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if (opc == 3) {
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tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, args[addrlo_idx + 1]);
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tcg_out_pushi(s, mem_index);
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tcg_out_push(s, data_reg2);
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tcg_out_push(s, data_reg);
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stack_adjust = 12;
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} else {
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tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, args[addrlo_idx + 1]);
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switch(opc) {
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case 0:
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tcg_out_ext8u(s, TCG_REG_ECX, data_reg);
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break;
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case 1:
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tcg_out_ext16u(s, TCG_REG_ECX, data_reg);
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break;
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case 2:
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tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_ECX, data_reg);
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break;
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}
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tcg_out_pushi(s, mem_index);
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stack_adjust = 4;
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}
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}
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#endif
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tcg_out_calli(s, (tcg_target_long)qemu_st_helpers[s_bits]);
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@ -1962,9 +1956,15 @@ static void tcg_target_qemu_prologue(TCGContext *s)
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tcg_out_push(s, tcg_target_callee_save_regs[i]);
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}
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tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
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#if TCG_TARGET_REG_BITS == 32
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tcg_out_ld(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_ESP,
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(ARRAY_SIZE(tcg_target_callee_save_regs) + 1) * 4);
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tcg_out_ld(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[1], TCG_REG_ESP,
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(ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4);
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#else
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
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#endif
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tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
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/* jmp *tb. */
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tcg_out_modrm(s, OPC_GRP5, EXT5_JMPN_Ev, tcg_target_call_iarg_regs[1]);
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@ -98,5 +98,5 @@ typedef enum {
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#define TCG_TARGET_HAS_GUEST_BASE
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#define tcg_qemu_tb_exec(env, tb_ptr) \
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((long REGPARM __attribute__ ((longcall)) \
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((long __attribute__ ((longcall)) \
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(*)(void *, void *))code_gen_prologue)(env, tb_ptr)
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14
tcg/tcg.c
14
tcg/tcg.c
@ -594,9 +594,6 @@ void tcg_register_helper(void *func, const char *name)
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void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
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int sizemask, TCGArg ret, int nargs, TCGArg *args)
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{
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#if defined(TCG_TARGET_I386) && TCG_TARGET_REG_BITS < 64
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int call_type;
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#endif
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int i;
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int real_args;
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int nb_rets;
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@ -621,9 +618,6 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
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*gen_opc_ptr++ = INDEX_op_call;
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nparam = gen_opparam_ptr++;
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#if defined(TCG_TARGET_I386) && TCG_TARGET_REG_BITS < 64
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call_type = (flags & TCG_CALL_TYPE_MASK);
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#endif
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if (ret != TCG_CALL_DUMMY_ARG) {
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#if TCG_TARGET_REG_BITS < 64
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if (sizemask & 1) {
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@ -649,14 +643,6 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
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#if TCG_TARGET_REG_BITS < 64
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int is_64bit = sizemask & (1 << (i+1)*2);
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if (is_64bit) {
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#ifdef TCG_TARGET_I386
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/* REGPARM case: if the third parameter is 64 bit, it is
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allocated on the stack */
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if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
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call_type = TCG_CALL_TYPE_REGPARM_2;
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flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
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}
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#endif
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#ifdef TCG_TARGET_CALL_ALIGN_ARGS
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/* some targets want aligned 64 bit args */
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if (real_args & 1) {
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@ -252,11 +252,6 @@ typedef int TCGv_i64;
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#define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
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/* call flags */
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#define TCG_CALL_TYPE_MASK 0x000f
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#define TCG_CALL_TYPE_STD 0x0000 /* standard C call */
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#define TCG_CALL_TYPE_REGPARM_1 0x0001 /* i386 style regparm call (1 reg) */
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#define TCG_CALL_TYPE_REGPARM_2 0x0002 /* i386 style regparm call (2 regs) */
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#define TCG_CALL_TYPE_REGPARM 0x0003 /* i386 style regparm call (3 regs) */
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/* A pure function only reads its arguments and TCG global variables
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and cannot raise exceptions. Hence a call to a pure function can be
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safely suppressed if the return value is not used. */
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@ -589,5 +584,5 @@ extern uint8_t code_gen_prologue[];
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/* TCG targets may use a different definition of tcg_qemu_tb_exec. */
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#if !defined(tcg_qemu_tb_exec)
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# define tcg_qemu_tb_exec(env, tb_ptr) \
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((tcg_target_ulong REGPARM (*)(void *, void *))code_gen_prologue)(env, tb_ptr)
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((tcg_target_ulong (*)(void *, void *))code_gen_prologue)(env, tb_ptr)
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#endif
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