target/s390x: Implement execution-hint insns
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -134,6 +134,15 @@
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D(0x8500, BRXLE, RSI, Z, 0, 0, 0, 0, bx32, 0, 1)
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D(0xec44, BRXHG, RIE_e, Z, 0, 0, 0, 0, bx64, 0, 0)
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D(0xec45, BRXHLE, RIE_e, Z, 0, 0, 0, 0, bx64, 0, 1)
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/* BRANCH PREDICTION PRELOAD */
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/* ??? Format is SMI, but implemented as NOP, so we need no fields. */
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C(0xc700, BPP, E, EH, 0, 0, 0, 0, 0, 0)
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/* BRANCH PREDICTION RELATIVE PRELOAD */
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/* ??? Format is MII, but implemented as NOP, so we need no fields. */
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C(0xc500, BPRP, E, EH, 0, 0, 0, 0, 0, 0)
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/* NEXT INSTRUCTION ACCESS INTENT */
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/* ??? Format is IE, but implemented as NOP, so we need no fields. */
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C(0xb2fa, NIAI, E, EH, 0, 0, 0, 0, 0, 0)
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/* CHECKSUM */
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C(0xb241, CKSM, RRE, Z, r1_o, ra2, new, r1_32, cksm, 0)
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@ -5443,6 +5443,7 @@ enum DisasInsnEnum {
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#define FAC_LPP S390_FEAT_SET_PROGRAM_PARAMETERS /* load-program-parameter */
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#define FAC_DAT_ENH S390_FEAT_DAT_ENH
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#define FAC_E2 S390_FEAT_EXTENDED_TRANSLATION_2
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#define FAC_EH S390_FEAT_STFLE_49 /* execution-hint */
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#define FAC_LZRB S390_FEAT_STFLE_53 /* load-and-zero-rightmost-byte */
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static const DisasInsn insn_info[] = {
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@ -5556,7 +5557,7 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s,
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case 0x80: /* S */
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case 0x82: /* S */
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case 0x93: /* S */
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case 0xb2: /* S, RRF, RRE */
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case 0xb2: /* S, RRF, RRE, IE */
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case 0xb3: /* RRE, RRD, RRF */
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case 0xb9: /* RRE, RRF */
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case 0xe5: /* SSE, SIL */
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@ -5572,6 +5573,8 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s,
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case 0xcc: /* RIL */
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op2 = (insn << 12) >> 60;
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break;
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case 0xc5: /* MII */
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case 0xc7: /* SMI */
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case 0xd0 ... 0xdf: /* SS */
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case 0xe1: /* SS */
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case 0xe2: /* SS */
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