hw/cxl: Add clear poison mailbox command support.
Current implementation is very simple so many of the corner cases do not exist (e.g. fragmenting larger poison list entries) Reviewed-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230526170010.574-5-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -65,6 +65,7 @@ enum {
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MEDIA_AND_POISON = 0x43,
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#define GET_POISON_LIST 0x0
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#define INJECT_POISON 0x1
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#define CLEAR_POISON 0x2
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};
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/* 8.2.8.4.5.1 Command Return Codes */
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@ -512,6 +513,85 @@ static CXLRetCode cmd_media_inject_poison(struct cxl_cmd *cmd,
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return CXL_MBOX_SUCCESS;
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}
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static CXLRetCode cmd_media_clear_poison(struct cxl_cmd *cmd,
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CXLDeviceState *cxl_dstate,
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uint16_t *len_unused)
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{
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CXLType3Dev *ct3d = container_of(cxl_dstate, CXLType3Dev, cxl_dstate);
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CXLPoisonList *poison_list = &ct3d->poison_list;
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CXLType3Class *cvc = CXL_TYPE3_GET_CLASS(ct3d);
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struct clear_poison_pl {
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uint64_t dpa;
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uint8_t data[64];
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};
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CXLPoison *ent;
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uint64_t dpa;
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struct clear_poison_pl *in = (void *)cmd->payload;
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dpa = ldq_le_p(&in->dpa);
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if (dpa + CXL_CACHE_LINE_SIZE > cxl_dstate->mem_size) {
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return CXL_MBOX_INVALID_PA;
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}
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/* Clearing a region with no poison is not an error so always do so */
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if (cvc->set_cacheline) {
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if (!cvc->set_cacheline(ct3d, dpa, in->data)) {
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return CXL_MBOX_INTERNAL_ERROR;
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}
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}
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QLIST_FOREACH(ent, poison_list, node) {
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/*
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* Test for contained in entry. Simpler than general case
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* as clearing 64 bytes and entries 64 byte aligned
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*/
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if ((dpa >= ent->start) && (dpa < ent->start + ent->length)) {
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break;
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}
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}
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if (!ent) {
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return CXL_MBOX_SUCCESS;
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}
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QLIST_REMOVE(ent, node);
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ct3d->poison_list_cnt--;
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if (dpa > ent->start) {
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CXLPoison *frag;
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/* Cannot overflow as replacing existing entry */
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frag = g_new0(CXLPoison, 1);
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frag->start = ent->start;
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frag->length = dpa - ent->start;
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frag->type = ent->type;
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QLIST_INSERT_HEAD(poison_list, frag, node);
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ct3d->poison_list_cnt++;
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}
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if (dpa + CXL_CACHE_LINE_SIZE < ent->start + ent->length) {
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CXLPoison *frag;
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if (ct3d->poison_list_cnt == CXL_POISON_LIST_LIMIT) {
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cxl_set_poison_list_overflowed(ct3d);
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} else {
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frag = g_new0(CXLPoison, 1);
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frag->start = dpa + CXL_CACHE_LINE_SIZE;
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frag->length = ent->start + ent->length - frag->start;
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frag->type = ent->type;
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QLIST_INSERT_HEAD(poison_list, frag, node);
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ct3d->poison_list_cnt++;
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}
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}
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/* Any fragments have been added, free original entry */
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g_free(ent);
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return CXL_MBOX_SUCCESS;
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}
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#define IMMEDIATE_CONFIG_CHANGE (1 << 1)
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#define IMMEDIATE_DATA_CHANGE (1 << 2)
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#define IMMEDIATE_POLICY_CHANGE (1 << 3)
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@ -543,6 +623,8 @@ static struct cxl_cmd cxl_cmd_set[256][256] = {
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cmd_media_get_poison_list, 16, 0 },
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[MEDIA_AND_POISON][INJECT_POISON] = { "MEDIA_AND_POISON_INJECT_POISON",
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cmd_media_inject_poison, 8, 0 },
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[MEDIA_AND_POISON][CLEAR_POISON] = { "MEDIA_AND_POISON_CLEAR_POISON",
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cmd_media_clear_poison, 72, 0 },
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};
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void cxl_process_mailbox(CXLDeviceState *cxl_dstate)
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@ -947,6 +947,42 @@ static void set_lsa(CXLType3Dev *ct3d, const void *buf, uint64_t size,
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*/
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}
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static bool set_cacheline(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data)
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{
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MemoryRegion *vmr = NULL, *pmr = NULL;
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AddressSpace *as;
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if (ct3d->hostvmem) {
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vmr = host_memory_backend_get_memory(ct3d->hostvmem);
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}
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if (ct3d->hostpmem) {
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pmr = host_memory_backend_get_memory(ct3d->hostpmem);
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}
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if (!vmr && !pmr) {
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return false;
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}
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if (dpa_offset + CXL_CACHE_LINE_SIZE > ct3d->cxl_dstate.mem_size) {
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return false;
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}
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if (vmr) {
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if (dpa_offset < memory_region_size(vmr)) {
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as = &ct3d->hostvmem_as;
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} else {
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as = &ct3d->hostpmem_as;
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dpa_offset -= memory_region_size(vmr);
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}
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} else {
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as = &ct3d->hostpmem_as;
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}
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address_space_write(as, dpa_offset, MEMTXATTRS_UNSPECIFIED, &data,
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CXL_CACHE_LINE_SIZE);
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return true;
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}
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void cxl_set_poison_list_overflowed(CXLType3Dev *ct3d)
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{
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ct3d->poison_list_overflowed = true;
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@ -1168,6 +1204,7 @@ static void ct3_class_init(ObjectClass *oc, void *data)
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cvc->get_lsa_size = get_lsa_size;
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cvc->get_lsa = get_lsa;
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cvc->set_lsa = set_lsa;
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cvc->set_cacheline = set_cacheline;
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}
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static const TypeInfo ct3d_info = {
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@ -298,6 +298,7 @@ struct CXLType3Class {
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uint64_t offset);
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void (*set_lsa)(CXLType3Dev *ct3d, const void *buf, uint64_t size,
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uint64_t offset);
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bool (*set_cacheline)(CXLType3Dev *ct3d, uint64_t dpa_offset, uint8_t *data);
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};
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MemTxResult cxl_type3_read(PCIDevice *d, hwaddr host_addr, uint64_t *data,
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