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armv7m: Move NVICState struct definition into header 

Move the NVICState struct definition into a header, so we can
embed it into other QOM objects like SoCs.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1487604965-23220-3-git-send-email-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2017-02-20 15:35:56 +00:00
parent 3651c28569
commit 6bf436cf9d
2 changed files with 67 additions and 48 deletions
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49
hw/intc/armv7m_nvic.c
View File

@ -17,6 +17,7 @@
#include "hw/sysbus.h"
#include "qemu/timer.h"
#include "hw/arm/arm.h"
#include "hw/arm/armv7m_nvic.h"
#include "target/arm/cpu.h"
#include "exec/address-spaces.h"
#include "qemu/log.h"
@ -47,7 +48,6 @@
* "exception" more or less interchangeably.
*/
#define NVIC_FIRST_IRQ 16
#define NVIC_MAX_VECTORS 512
#define NVIC_MAX_IRQ (NVIC_MAX_VECTORS - NVIC_FIRST_IRQ)
/* Effective running priority of the CPU when no exception is active
@ -55,53 +55,6 @@
*/
#define NVIC_NOEXC_PRIO 0x100
typedef struct VecInfo {
/* Exception priorities can range from -3 to 255; only the unmodifiable
* priority values for RESET, NMI and HardFault can be negative.
*/
int16_t prio;
uint8_t enabled;
uint8_t pending;
uint8_t active;
uint8_t level; /* exceptions <=15 never set level */
} VecInfo;
typedef struct NVICState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
ARMCPU *cpu;
VecInfo vectors[NVIC_MAX_VECTORS];
uint32_t prigroup;
/* vectpending and exception_prio are both cached state that can
* be recalculated from the vectors[] array and the prigroup field.
*/
unsigned int vectpending; /* highest prio pending enabled exception */
int exception_prio; /* group prio of the highest prio active exception */
struct {
uint32_t control;
uint32_t reload;
int64_t tick;
QEMUTimer *timer;
} systick;
MemoryRegion sysregmem;
MemoryRegion container;
uint32_t num_irq;
qemu_irq excpout;
qemu_irq sysresetreq;
} NVICState;
#define TYPE_NVIC "armv7m_nvic"
#define NVIC(obj) \
OBJECT_CHECK(NVICState, (obj), TYPE_NVIC)
static const uint8_t nvic_id[] = {
0x00, 0xb0, 0x1b, 0x00, 0x0d, 0xe0, 0x05, 0xb1
};

66
include/hw/arm/armv7m_nvic.h Normal file
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@ -0,0 +1,66 @@
/*
* ARMv7M NVIC object
*
* Copyright (c) 2017 Linaro Ltd
* Written by Peter Maydell <peter.maydell@linaro.org>
*
* This code is licensed under the GPL version 2 or later.
*/
#ifndef HW_ARM_ARMV7M_NVIC_H
#define HW_ARM_ARMV7M_NVIC_H
#include "target/arm/cpu.h"
#include "hw/sysbus.h"
#define TYPE_NVIC "armv7m_nvic"
#define NVIC(obj) \
OBJECT_CHECK(NVICState, (obj), TYPE_NVIC)
/* Highest permitted number of exceptions (architectural limit) */
#define NVIC_MAX_VECTORS 512
typedef struct VecInfo {
/* Exception priorities can range from -3 to 255; only the unmodifiable
* priority values for RESET, NMI and HardFault can be negative.
*/
int16_t prio;
uint8_t enabled;
uint8_t pending;
uint8_t active;
uint8_t level; /* exceptions <=15 never set level */
} VecInfo;
typedef struct NVICState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
ARMCPU *cpu;
VecInfo vectors[NVIC_MAX_VECTORS];
uint32_t prigroup;
/* vectpending and exception_prio are both cached state that can
* be recalculated from the vectors[] array and the prigroup field.
*/
unsigned int vectpending; /* highest prio pending enabled exception */
int exception_prio; /* group prio of the highest prio active exception */
struct {
uint32_t control;
uint32_t reload;
int64_t tick;
QEMUTimer *timer;
} systick;
MemoryRegion sysregmem;
MemoryRegion container;
uint32_t num_irq;
qemu_irq excpout;
qemu_irq sysresetreq;
} NVICState;
#endif