target/arm: Enforce alignment for VLDR/VSTR
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210419202257.161730-22-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1364,11 +1364,11 @@ static bool trans_VLDR_VSTR_hp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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addr = add_reg_for_lit(s, a->rn, offset);
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tmp = tcg_temp_new_i32();
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if (a->l) {
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gen_aa32_ld16u(s, tmp, addr, get_mem_index(s));
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gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), MO_UW | MO_ALIGN);
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vfp_store_reg32(tmp, a->vd);
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} else {
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vfp_load_reg32(tmp, a->vd);
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gen_aa32_st16(s, tmp, addr, get_mem_index(s));
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gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), MO_UW | MO_ALIGN);
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}
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tcg_temp_free_i32(tmp);
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tcg_temp_free_i32(addr);
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@ -1398,11 +1398,11 @@ static bool trans_VLDR_VSTR_sp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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addr = add_reg_for_lit(s, a->rn, offset);
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tmp = tcg_temp_new_i32();
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if (a->l) {
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gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
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gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), MO_UL | MO_ALIGN);
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vfp_store_reg32(tmp, a->vd);
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} else {
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vfp_load_reg32(tmp, a->vd);
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gen_aa32_st32(s, tmp, addr, get_mem_index(s));
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gen_aa32_st_i32(s, tmp, addr, get_mem_index(s), MO_UL | MO_ALIGN);
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}
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tcg_temp_free_i32(tmp);
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tcg_temp_free_i32(addr);
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@ -1439,11 +1439,11 @@ static bool trans_VLDR_VSTR_dp(DisasContext *s, arg_VLDR_VSTR_dp *a)
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addr = add_reg_for_lit(s, a->rn, offset);
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tmp = tcg_temp_new_i64();
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if (a->l) {
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gen_aa32_ld64(s, tmp, addr, get_mem_index(s));
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gen_aa32_ld_i64(s, tmp, addr, get_mem_index(s), MO_Q | MO_ALIGN_4);
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vfp_store_reg64(tmp, a->vd);
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} else {
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vfp_load_reg64(tmp, a->vd);
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gen_aa32_st64(s, tmp, addr, get_mem_index(s));
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gen_aa32_st_i64(s, tmp, addr, get_mem_index(s), MO_Q | MO_ALIGN_4);
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}
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i32(addr);
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