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target-ppc: Add ISA 2.06 ftsqrt 

This patch adds the Floating Point Test for Square Root instruction
which was introduced in Power ISA 2.06.

Signed-off-by: Tom Musta <tommusta@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-01-07 10:06:08 -06:00 committed by Alexander Graf
parent da29cb7bc7
commit 6d41d146c9
3 changed files with 42 additions and 0 deletions
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31
target-ppc/fpu_helper.c
View File

@ -1039,6 +1039,37 @@ uint32_t helper_ftdiv(uint64_t fra, uint64_t frb)
return 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0);
}
uint32_t helper_ftsqrt(uint64_t frb)
{
int fe_flag = 0;
int fg_flag = 0;
if (unlikely(float64_is_infinity(frb) || float64_is_zero(frb))) {
fe_flag = 1;
fg_flag = 1;
} else {
int e_b = ppc_float64_get_unbiased_exp(frb);
if (unlikely(float64_is_any_nan(frb))) {
fe_flag = 1;
} else if (unlikely(float64_is_zero(frb))) {
fe_flag = 1;
} else if (unlikely(float64_is_neg(frb))) {
fe_flag = 1;
} else if (!float64_is_zero(frb) && (e_b <= (-1022+52))) {
fe_flag = 1;
}
if (unlikely(float64_is_zero_or_denormal(frb))) {
/* XB is not zero because of the above check and */
/* therefore must be denormalized. */
fg_flag = 1;
}
}
return 0x8 | (fg_flag ? 4 : 0) | (fe_flag ? 2 : 0);
}
void helper_fcmpu(CPUPPCState *env, uint64_t arg1, uint64_t arg2,
uint32_t crfD)
{

1
target-ppc/helper.h
View File

@ -100,6 +100,7 @@ DEF_HELPER_2(frsqrte, i64, env, i64)
DEF_HELPER_4(fsel, i64, env, i64, i64, i64)
DEF_HELPER_FLAGS_2(ftdiv, TCG_CALL_NO_RWG_SE, i32, i64, i64)
DEF_HELPER_FLAGS_1(ftsqrt, TCG_CALL_NO_RWG_SE, i32, i64)
#define dh_alias_avr ptr
#define dh_ctype_avr ppc_avr_t *

10
target-ppc/translate.c
View File

@ -2248,6 +2248,15 @@ static void gen_ftdiv(DisasContext *ctx)
cpu_fpr[rB(ctx->opcode)]);
}
static void gen_ftsqrt(DisasContext *ctx)
{
if (unlikely(!ctx->fpu_enabled)) {
gen_exception(ctx, POWERPC_EXCP_FPU);
return;
}
gen_helper_ftsqrt(cpu_crf[crfD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)]);
}
/*** Floating-Point compare ***/
@ -9869,6 +9878,7 @@ GEN_FLOAT_ACB(msub, 0x1C, 1, PPC_FLOAT),
GEN_FLOAT_ACB(nmadd, 0x1F, 1, PPC_FLOAT),
GEN_FLOAT_ACB(nmsub, 0x1E, 1, PPC_FLOAT),
GEN_HANDLER_E(ftdiv, 0x3F, 0x00, 0x04, 1, PPC_NONE, PPC2_FP_TST_ISA206),
GEN_HANDLER_E(ftsqrt, 0x3F, 0x00, 0x05, 1, PPC_NONE, PPC2_FP_TST_ISA206),
GEN_FLOAT_B(ctiw, 0x0E, 0x00, 0, PPC_FLOAT),
GEN_HANDLER_E(fctiwu, 0x3F, 0x0E, 0x04, 0, PPC_NONE, PPC2_FP_CVT_ISA206),
GEN_FLOAT_B(ctiwz, 0x0F, 0x00, 0, PPC_FLOAT),