s390x/tcg: Hide IEEE underflows in some scenarios
IEEE underflows are not reported when the mask bit is off and we don't also have an inexact exception. z14 PoP, 9-20, "IEEE Underflow": An IEEE-underflow exception is recognized for an IEEE target when the tininess condition exists and either: (1) the IEEE-underflow mask bit in the FPC register is zero and the result value is inexact, or (2) the IEEE-underflow mask bit in the FPC register is one. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190218122710.23639-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -63,6 +63,19 @@ static void handle_exceptions(CPUS390XState *env, uintptr_t retaddr)
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env->fpu_status.float_exception_flags = 0;
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s390_exc = s390_softfloat_exc_to_ieee(qemu_exc);
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/*
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* IEEE-Underflow exception recognition exists if a tininess condition
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* (underflow) exists and
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* - The mask bit in the FPC is zero and the result is inexact
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* - The mask bit in the FPC is one
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* So tininess conditions that are not inexact don't trigger any
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* underflow action in case the mask bit is not one.
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*/
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if (!(s390_exc & S390_IEEE_MASK_INEXACT) &&
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!((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) {
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s390_exc &= ~S390_IEEE_MASK_UNDERFLOW;
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}
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/*
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* FIXME:
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* 1. Right now, all inexact conditions are inidicated as
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