usb-ohci: convert to MemoryRegion

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity 2011-07-26 14:26:22 +03:00 committed by Anthony Liguori
parent ec3bb837a2
commit 6da48311bb
1 changed files with 17 additions and 25 deletions

View File

@ -62,7 +62,7 @@ typedef struct OHCIPort {
typedef struct { typedef struct {
USBBus bus; USBBus bus;
qemu_irq irq; qemu_irq irq;
int mem; MemoryRegion mem;
int num_ports; int num_ports;
const char *name; const char *name;
@ -1440,13 +1440,13 @@ static void ohci_port_set_status(OHCIState *ohci, int portnum, uint32_t val)
return; return;
} }
static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr) static uint64_t ohci_mem_read(void *opaque,
target_phys_addr_t addr,
unsigned size)
{ {
OHCIState *ohci = ptr; OHCIState *ohci = opaque;
uint32_t retval; uint32_t retval;
addr &= 0xff;
/* Only aligned reads are allowed on OHCI */ /* Only aligned reads are allowed on OHCI */
if (addr & 3) { if (addr & 3) {
fprintf(stderr, "usb-ohci: Mis-aligned read\n"); fprintf(stderr, "usb-ohci: Mis-aligned read\n");
@ -1563,11 +1563,12 @@ static uint32_t ohci_mem_read(void *ptr, target_phys_addr_t addr)
return retval; return retval;
} }
static void ohci_mem_write(void *ptr, target_phys_addr_t addr, uint32_t val) static void ohci_mem_write(void *opaque,
target_phys_addr_t addr,
uint64_t val,
unsigned size)
{ {
OHCIState *ohci = ptr; OHCIState *ohci = opaque;
addr &= 0xff;
/* Only aligned reads are allowed on OHCI */ /* Only aligned reads are allowed on OHCI */
if (addr & 3) { if (addr & 3) {
@ -1697,18 +1698,10 @@ static void ohci_async_cancel_device(OHCIState *ohci, USBDevice *dev)
} }
} }
/* Only dword reads are defined on OHCI register space */ static const MemoryRegionOps ohci_mem_ops = {
static CPUReadMemoryFunc * const ohci_readfn[3]={ .read = ohci_mem_read,
ohci_mem_read, .write = ohci_mem_write,
ohci_mem_read, .endianness = DEVICE_LITTLE_ENDIAN,
ohci_mem_read
};
/* Only dword writes are defined on OHCI register space */
static CPUWriteMemoryFunc * const ohci_writefn[3]={
ohci_mem_write,
ohci_mem_write,
ohci_mem_write
}; };
static USBPortOps ohci_port_ops = { static USBPortOps ohci_port_ops = {
@ -1764,8 +1757,7 @@ static int usb_ohci_init(OHCIState *ohci, DeviceState *dev,
} }
} }
ohci->mem = cpu_register_io_memory(ohci_readfn, ohci_writefn, ohci, memory_region_init_io(&ohci->mem, &ohci_mem_ops, ohci, "ohci", 256);
DEVICE_LITTLE_ENDIAN);
ohci->localmem_base = localmem_base; ohci->localmem_base = localmem_base;
ohci->name = dev->info->name; ohci->name = dev->info->name;
@ -1799,7 +1791,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev)
ohci->state.irq = ohci->pci_dev.irq[0]; ohci->state.irq = ohci->pci_dev.irq[0];
/* TODO: avoid cast below by using dev */ /* TODO: avoid cast below by using dev */
pci_register_bar_simple(&ohci->pci_dev, 0, 256, 0, ohci->state.mem); pci_register_bar_region(&ohci->pci_dev, 0, 0, &ohci->state.mem);
return 0; return 0;
} }
@ -1822,7 +1814,7 @@ static int ohci_init_pxa(SysBusDevice *dev)
/* Cannot fail as we pass NULL for masterbus */ /* Cannot fail as we pass NULL for masterbus */
usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0); usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0);
sysbus_init_irq(dev, &s->ohci.irq); sysbus_init_irq(dev, &s->ohci.irq);
sysbus_init_mmio(dev, 0x1000, s->ohci.mem); sysbus_init_mmio_region(dev, &s->ohci.mem);
return 0; return 0;
} }