OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

tests/tcg/tricore: Add LD.BU tests 

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230202120432.1268-11-kbastian@mail.uni-paderborn.de>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
This commit is contained in:
Bastian Koppelmann 2023-02-02 13:04:32 +01:00
parent d8b33554d8
commit 6dcb9922f3
3 changed files with 39 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
tests/tcg/tricore/Makefile.softmmu-target
View File

@ -13,6 +13,7 @@ TESTS += test_fmul.tst
TESTS += test_ftoi.tst
TESTS += test_imask.tst
TESTS += test_insert.tst
TESTS += test_ld_bu.tst
TESTS += test_madd.tst
TESTS += test_msub.tst
TESTS += test_muls.tst

23
tests/tcg/tricore/macros.h
View File

@ -4,6 +4,10 @@
movh DREG_TEMP_LI, up:val; \
or reg, reg, DREG_TEMP_LI; \
#define LIA(reg, val) \
LI(DREG_TEMP, val) \
mov.a reg, DREG_TEMP;
/* Address definitions */
#define TESTDEV_ADDR 0xf0000000
/* Register definitions */
@ -18,6 +22,10 @@
#define DREG_TEST_NUM %d14
#define DREG_CORRECT_RESULT %d15
#define AREG_ADDR %a0
#define AREG_CORRECT_RESULT %a3
#define MEM_BASE_ADDR 0xd0000000
#define DREG_DEV_ADDR %a15
#define EREG_RS1 %e6
@ -60,11 +68,24 @@ test_ ## num: \
mov DREG_TEST_NUM, num; \
jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
#define TEST_LD(insn, num, result, addr_result, ld_pattern) \
test_ ## num: \
LIA(AREG_ADDR, test_data) \
insn DREG_CALC_RESULT, ld_pattern; \
LI(DREG_CORRECT_RESULT, result) \
mov DREG_TEST_NUM, num; \
jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail; \
mov.d DREG_CALC_RESULT, AREG_ADDR; \
LI(DREG_CORRECT_RESULT, addr_result) \
jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
/* Actual test case type
* e.g inst %dX, %dY -> TEST_D_D
* inst %dX, %dY, %dZ -> TEST_D_DD
* inst %eX, %dY, %dZ -> TEST_E_DD
*/
#define TEST_D_D(insn, num, result, rs1) \
TEST_CASE(num, DREG_CALC_RESULT, result, \
LI(DREG_RS1, rs1); \
@ -143,6 +164,8 @@ test_ ## num: \
insn EREG_CALC_RESULT, imm1, DREG_RS1, imm2); \
)
/* Pass/Fail handling part */
#define TEST_PASSFAIL \
j pass; \

15
tests/tcg/tricore/test_ld_bu.S Normal file
View File

@ -0,0 +1,15 @@
#include "macros.h"
.data
test_data:
.word 0xaffedead
.word 0x001122ff
.text
.global _start
_start:
# expect. addr reg val after load
# insn num expect. load value | pattern for loading
# | | | | |
TEST_LD(ld.bu, 1, 0xff, MEM_BASE_ADDR + 4, [+AREG_ADDR]4) # pre_inc
TEST_LD(ld.bu, 2, 0xad, MEM_BASE_ADDR + 4, [AREG_ADDR+]4) # post_inc
TEST_PASSFAIL