alpha-linux-user: Handle TARGET_SSI_IEEE_RAISE_EXCEPTION properly

We weren't aggregating the exceptions, nor raising signals properly.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2012-06-01 09:08:21 -07:00
parent 76393642ae
commit 6e06d515d4

View File

@ -7699,13 +7699,13 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
ret = -TARGET_EOPNOTSUPP;
switch (arg1) {
case TARGET_SSI_IEEE_FP_CONTROL:
case TARGET_SSI_IEEE_RAISE_EXCEPTION:
{
uint64_t swcr, fpcr, orig_fpcr;
if (get_user_u64 (swcr, arg2))
if (get_user_u64 (swcr, arg2)) {
goto efault;
orig_fpcr = cpu_alpha_load_fpcr (cpu_env);
}
orig_fpcr = cpu_alpha_load_fpcr(cpu_env);
fpcr = orig_fpcr & FPCR_DYN_MASK;
/* Copied from linux ieee_swcr_to_fpcr. */
@ -7719,16 +7719,57 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
fpcr |= (swcr & SWCR_MAP_UMZ ? FPCR_UNDZ | FPCR_UNFD : 0);
fpcr |= (~swcr & SWCR_TRAP_ENABLE_DNO) << 41;
cpu_alpha_store_fpcr (cpu_env, fpcr);
cpu_alpha_store_fpcr(cpu_env, fpcr);
ret = 0;
}
break;
case TARGET_SSI_IEEE_RAISE_EXCEPTION:
{
uint64_t exc, fpcr, orig_fpcr;
int si_code;
if (get_user_u64(exc, arg2)) {
goto efault;
}
orig_fpcr = cpu_alpha_load_fpcr(cpu_env);
/* We only add to the exception status here. */
fpcr = orig_fpcr | ((exc & SWCR_STATUS_MASK) << 35);
cpu_alpha_store_fpcr(cpu_env, fpcr);
ret = 0;
if (arg1 == TARGET_SSI_IEEE_RAISE_EXCEPTION) {
/* Old exceptions are not signaled. */
fpcr &= ~(orig_fpcr & FPCR_STATUS_MASK);
/* Old exceptions are not signaled. */
fpcr &= ~(orig_fpcr & FPCR_STATUS_MASK);
/* If any exceptions set by this call, and are unmasked,
send a signal. */
/* ??? FIXME */
/* If any exceptions set by this call,
and are unmasked, send a signal. */
si_code = 0;
if ((fpcr & (FPCR_INE | FPCR_INED)) == FPCR_INE) {
si_code = TARGET_FPE_FLTRES;
}
if ((fpcr & (FPCR_UNF | FPCR_UNFD)) == FPCR_UNF) {
si_code = TARGET_FPE_FLTUND;
}
if ((fpcr & (FPCR_OVF | FPCR_OVFD)) == FPCR_OVF) {
si_code = TARGET_FPE_FLTOVF;
}
if ((fpcr & (FPCR_DZE | FPCR_DZED)) == FPCR_DZE) {
si_code = TARGET_FPE_FLTDIV;
}
if ((fpcr & (FPCR_INV | FPCR_INVD)) == FPCR_INV) {
si_code = TARGET_FPE_FLTINV;
}
if (si_code != 0) {
target_siginfo_t info;
info.si_signo = SIGFPE;
info.si_errno = 0;
info.si_code = si_code;
info._sifields._sigfault._addr
= ((CPUArchState *)cpu_env)->pc;
queue_signal((CPUArchState *)cpu_env, info.si_signo, &info);
}
}
break;