target/ppc: Implement lxvkq instruction
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Luis Pires <luis.pires@eldorado.org.br> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20211104123719.323713-25-matheus.ferst@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -100,6 +100,9 @@
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&X_imm8 xt imm:uint8_t
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&X_imm8 xt imm:uint8_t
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@X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt
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@X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt
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&X_uim5 xt uim:uint8_t
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@X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt
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&X_tb_sp_rc rt rb sp rc:bool
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&X_tb_sp_rc rt rb sp rc:bool
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@X_tb_sp_rc ...... rt:5 sp:2 ... rb:5 .......... rc:1 &X_tb_sp_rc
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@X_tb_sp_rc ...... rt:5 sp:2 ... rb:5 .......... rc:1 &X_tb_sp_rc
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@ -420,3 +423,7 @@ STXVPX 011111 ..... ..... ..... 0111001101 - @X_TSXP
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XXSPLTIB 111100 ..... 00 ........ 0101101000 . @X_imm8
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XXSPLTIB 111100 ..... 00 ........ 0101101000 . @X_imm8
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XXSPLTW 111100 ..... ---.. ..... 010100100 . . @XX2
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XXSPLTW 111100 ..... ---.. ..... 010100100 . . @XX2
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## VSX Vector Load Special Value Instruction
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LXVKQ 111100 ..... 11111 ..... 0101101000 . @X_uim5
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@ -1503,6 +1503,49 @@ static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a)
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return true;
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return true;
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}
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}
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static bool trans_LXVKQ(DisasContext *ctx, arg_X_uim5 *a)
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{
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static const uint64_t values[32] = {
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0, /* Unspecified */
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0x3FFF000000000000llu, /* QP +1.0 */
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0x4000000000000000llu, /* QP +2.0 */
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0x4000800000000000llu, /* QP +3.0 */
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0x4001000000000000llu, /* QP +4.0 */
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0x4001400000000000llu, /* QP +5.0 */
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0x4001800000000000llu, /* QP +6.0 */
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0x4001C00000000000llu, /* QP +7.0 */
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0x7FFF000000000000llu, /* QP +Inf */
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0x7FFF800000000000llu, /* QP dQNaN */
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0, /* Unspecified */
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0, /* Unspecified */
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0, /* Unspecified */
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0, /* Unspecified */
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0, /* Unspecified */
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0, /* Unspecified */
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0x8000000000000000llu, /* QP -0.0 */
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0xBFFF000000000000llu, /* QP -1.0 */
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0xC000000000000000llu, /* QP -2.0 */
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0xC000800000000000llu, /* QP -3.0 */
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0xC001000000000000llu, /* QP -4.0 */
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0xC001400000000000llu, /* QP -5.0 */
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0xC001800000000000llu, /* QP -6.0 */
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0xC001C00000000000llu, /* QP -7.0 */
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0xFFFF000000000000llu, /* QP -Inf */
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};
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REQUIRE_INSNS_FLAGS2(ctx, ISA310);
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REQUIRE_VSX(ctx);
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if (values[a->uim]) {
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set_cpu_vsr(a->xt, tcg_constant_i64(0x0), false);
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set_cpu_vsr(a->xt, tcg_constant_i64(values[a->uim]), true);
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} else {
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gen_invalid(ctx);
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}
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return true;
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}
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static void gen_xxsldwi(DisasContext *ctx)
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static void gen_xxsldwi(DisasContext *ctx)
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{
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{
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TCGv_i64 xth, xtl;
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TCGv_i64 xth, xtl;
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