target/hexagon/idef-parser: Drop HexValue.is_manual

This field is no longer used.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-24 18:48:00 -10:00
parent 3c28efd4cb
commit 6e3dcc84e4
3 changed files with 0 additions and 18 deletions

View File

@ -185,7 +185,6 @@ typedef struct HexValue {
unsigned bit_width; /**< Bit width of the rvalue */
HexSignedness signedness; /**< Unsigned flag for the rvalue */
bool is_dotnew; /**< rvalue of predicate type is dotnew? */
bool is_manual; /**< Opt out of automatic freeing of params */
} HexValue;
/**

View File

@ -534,7 +534,6 @@ rvalue : FAIL
rvalue.imm.type = IMM_CONSTEXT;
rvalue.signedness = UNSIGNED;
rvalue.is_dotnew = false;
rvalue.is_manual = false;
$$ = rvalue;
}
| var
@ -693,7 +692,6 @@ rvalue : FAIL
}
| rvalue '?'
{
$1.is_manual = true;
Ternary t = { 0 };
t.state = IN_LEFT;
t.cond = $1;

View File

@ -278,7 +278,6 @@ static HexValue gen_constant(Context *c,
rvalue.bit_width = bit_width;
rvalue.signedness = signedness;
rvalue.is_dotnew = false;
rvalue.is_manual = true;
rvalue.tmp.index = c->inst.tmp_count;
OUT(c, locp, "TCGv_i", &bit_width, " tmp_", &c->inst.tmp_count,
" = tcg_constant_i", &bit_width, "(", value, ");\n");
@ -299,7 +298,6 @@ HexValue gen_tmp(Context *c,
rvalue.bit_width = bit_width;
rvalue.signedness = signedness;
rvalue.is_dotnew = false;
rvalue.is_manual = false;
rvalue.tmp.index = c->inst.tmp_count;
OUT(c, locp, "TCGv_i", &bit_width, " tmp_", &c->inst.tmp_count,
" = tcg_temp_new_i", &bit_width, "();\n");
@ -320,7 +318,6 @@ HexValue gen_tmp_value(Context *c,
rvalue.bit_width = bit_width;
rvalue.signedness = signedness;
rvalue.is_dotnew = false;
rvalue.is_manual = false;
rvalue.tmp.index = c->inst.tmp_count;
OUT(c, locp, "TCGv_i", &bit_width, " tmp_", &c->inst.tmp_count,
" = tcg_const_i", &bit_width, "(", value, ");\n");
@ -339,7 +336,6 @@ static HexValue gen_tmp_value_from_imm(Context *c,
rvalue.bit_width = value->bit_width;
rvalue.signedness = value->signedness;
rvalue.is_dotnew = false;
rvalue.is_manual = false;
rvalue.tmp.index = c->inst.tmp_count;
/*
* Here we output the call to `tcg_const_i<width>` in
@ -375,7 +371,6 @@ HexValue gen_imm_value(Context *c __attribute__((unused)),
rvalue.bit_width = bit_width;
rvalue.signedness = signedness;
rvalue.is_dotnew = false;
rvalue.is_manual = false;
rvalue.imm.type = VALUE;
rvalue.imm.value = value;
return rvalue;
@ -390,7 +385,6 @@ HexValue gen_imm_qemu_tmp(Context *c, YYLTYPE *locp, unsigned bit_width,
memset(&rvalue, 0, sizeof(HexValue));
rvalue.type = IMMEDIATE;
rvalue.is_dotnew = false;
rvalue.is_manual = false;
rvalue.bit_width = bit_width;
rvalue.signedness = signedness;
rvalue.imm.type = QEMU_TMP;
@ -1242,15 +1236,12 @@ void gen_rdeposit_op(Context *c,
*/
k64 = gen_bin_op(c, locp, SUB_OP, &k64, &width_m);
mask = gen_bin_op(c, locp, LSR_OP, &mask, &k64);
begin_m.is_manual = true;
mask = gen_bin_op(c, locp, ASL_OP, &mask, &begin_m);
mask.is_manual = true;
value_m = gen_bin_op(c, locp, ASL_OP, &value_m, &begin_m);
value_m = gen_bin_op(c, locp, ANDB_OP, &value_m, &mask);
OUT(c, locp, "tcg_gen_not_i", &dst->bit_width, "(", &mask, ", ",
&mask, ");\n");
mask.is_manual = false;
res = gen_bin_op(c, locp, ANDB_OP, dst, &mask);
res = gen_bin_op(c, locp, ORB_OP, &res, &value_m);
@ -1410,8 +1401,6 @@ HexValue gen_convround(Context *c,
HexValue and;
HexValue src_p1;
src_m.is_manual = true;
and = gen_bin_op(c, locp, ANDB_OP, &src_m, &mask);
src_p1 = gen_bin_op(c, locp, ADD_OP, &src_m, &one);
@ -1569,10 +1558,6 @@ HexValue gen_round(Context *c,
b = gen_extend_op(c, locp, &src_width, 64, pos, UNSIGNED);
b = rvalue_materialize(c, locp, &b);
/* Disable auto-free of values used more than once */
a.is_manual = true;
b.is_manual = true;
n_m1 = gen_bin_op(c, locp, SUB_OP, &b, &one);
shifted = gen_bin_op(c, locp, ASL_OP, &one, &n_m1);
sum = gen_bin_op(c, locp, ADD_OP, &shifted, &a);