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target/hppa: Fix EIRR, EIEM versus icount

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Call translator_io_start before write to EIRR.
Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt.
Exit TB after write to EIEM, but otherwise use a straight store.

Reviewed-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-03-22 14:45:06 -10:00
parent 0c58c1bc1c
commit 6ebebea758
3 changed files with 11 additions and 14 deletions
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1
target/hppa/helper.h
View File

@ -91,7 +91,6 @@ DEF_HELPER_1(rfi, void, env)
DEF_HELPER_1(rfi_r, void, env) DEF_HELPER_1(rfi_r, void, env)
DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_2(write_eiem, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl) DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl)
DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl) DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)

14
target/hppa/int_helper.c
View File

@ -28,7 +28,7 @@
static void eval_interrupt(HPPACPU *cpu) static void eval_interrupt(HPPACPU *cpu)
{ {
CPUState *cs = CPU(cpu); CPUState *cs = CPU(cpu);
if (cpu->env.cr[CR_EIRR] & cpu->env.cr[CR_EIEM]) { if (cpu->env.cr[CR_EIRR]) {
cpu_interrupt(cs, CPU_INTERRUPT_HARD); cpu_interrupt(cs, CPU_INTERRUPT_HARD);
} else { } else {
cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
@ -89,14 +89,6 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ulong val)
bql_unlock(); bql_unlock();
} }
void HELPER(write_eiem)(CPUHPPAState *env, target_ulong val)
{
env->cr[CR_EIEM] = val;
bql_lock();
eval_interrupt(env_archcpu(env));
bql_unlock();
}
void hppa_cpu_do_interrupt(CPUState *cs) void hppa_cpu_do_interrupt(CPUState *cs)
{ {
HPPACPU *cpu = HPPA_CPU(cs); HPPACPU *cpu = HPPA_CPU(cs);
@ -280,7 +272,9 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
} }
/* If interrupts are requested and enabled, raise them. */ /* If interrupts are requested and enabled, raise them. */
if ((env->psw & PSW_I) && (interrupt_request & CPU_INTERRUPT_HARD)) { if ((interrupt_request & CPU_INTERRUPT_HARD)
&& (env->psw & PSW_I)
&& (env->cr[CR_EIRR] & env->cr[CR_EIEM])) {
cs->exception_index = EXCP_EXT_INTERRUPT; cs->exception_index = EXCP_EXT_INTERRUPT;
hppa_cpu_do_interrupt(cs); hppa_cpu_do_interrupt(cs);
return true; return true;

10
target/hppa/translate.c
View File

@ -2166,10 +2166,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
gen_helper_write_interval_timer(tcg_env, reg); gen_helper_write_interval_timer(tcg_env, reg);
break; break;
case CR_EIRR: case CR_EIRR:
/* Helper modifies interrupt lines and is therefore IO. */
translator_io_start(&ctx->base);
gen_helper_write_eirr(tcg_env, reg); gen_helper_write_eirr(tcg_env, reg);
break; /* Exit to re-evaluate interrupts in the main loop. */
case CR_EIEM:
gen_helper_write_eiem(tcg_env, reg);
ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT; ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
break; break;
@ -2195,6 +2195,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
#endif #endif
break; break;
case CR_EIEM:
/* Exit to re-evaluate interrupts in the main loop. */
ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
/* FALLTHRU */
default: default:
tcg_gen_st_i64(reg, tcg_env, offsetof(CPUHPPAState, cr[ctl])); tcg_gen_st_i64(reg, tcg_env, offsetof(CPUHPPAState, cr[ctl]));
break; break;