target/hppa: Fix EIRR, EIEM versus icount
Call translator_io_start before write to EIRR. Move evaluation of EIRR vs EIEM to hppa_cpu_exec_interrupt. Exit TB after write to EIEM, but otherwise use a straight store. Reviewed-by: Helge Deller <deller@gmx.de> Tested-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -91,7 +91,6 @@ DEF_HELPER_1(rfi, void, env)
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DEF_HELPER_1(rfi_r, void, env)
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DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(write_eirr, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(write_eiem, TCG_CALL_NO_RWG, void, env, tl)
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DEF_HELPER_FLAGS_2(swap_system_mask, TCG_CALL_NO_RWG, tl, env, tl)
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DEF_HELPER_FLAGS_3(itlba_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
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DEF_HELPER_FLAGS_3(itlbp_pa11, TCG_CALL_NO_RWG, void, env, tl, tl)
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@ -28,7 +28,7 @@
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static void eval_interrupt(HPPACPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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if (cpu->env.cr[CR_EIRR] & cpu->env.cr[CR_EIEM]) {
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if (cpu->env.cr[CR_EIRR]) {
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cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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} else {
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
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@ -89,14 +89,6 @@ void HELPER(write_eirr)(CPUHPPAState *env, target_ulong val)
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bql_unlock();
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}
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void HELPER(write_eiem)(CPUHPPAState *env, target_ulong val)
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{
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env->cr[CR_EIEM] = val;
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bql_lock();
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eval_interrupt(env_archcpu(env));
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bql_unlock();
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}
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void hppa_cpu_do_interrupt(CPUState *cs)
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{
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HPPACPU *cpu = HPPA_CPU(cs);
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@ -280,7 +272,9 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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}
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/* If interrupts are requested and enabled, raise them. */
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if ((env->psw & PSW_I) && (interrupt_request & CPU_INTERRUPT_HARD)) {
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if ((interrupt_request & CPU_INTERRUPT_HARD)
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&& (env->psw & PSW_I)
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&& (env->cr[CR_EIRR] & env->cr[CR_EIEM])) {
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cs->exception_index = EXCP_EXT_INTERRUPT;
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hppa_cpu_do_interrupt(cs);
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return true;
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@ -2166,10 +2166,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
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gen_helper_write_interval_timer(tcg_env, reg);
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break;
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case CR_EIRR:
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/* Helper modifies interrupt lines and is therefore IO. */
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translator_io_start(&ctx->base);
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gen_helper_write_eirr(tcg_env, reg);
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break;
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case CR_EIEM:
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gen_helper_write_eiem(tcg_env, reg);
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/* Exit to re-evaluate interrupts in the main loop. */
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ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
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break;
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@ -2195,6 +2195,10 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
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#endif
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break;
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case CR_EIEM:
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/* Exit to re-evaluate interrupts in the main loop. */
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ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
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/* FALLTHRU */
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default:
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tcg_gen_st_i64(reg, tcg_env, offsetof(CPUHPPAState, cr[ctl]));
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break;
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