docs/cxl: Cleanout some more aarch64 examples.
These crossed with the previous fix to get rid of examples using aarch64 for which support is not yet upstream. Reviewed-by: Fan Ni <fan.ni@samsung.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1892 Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -313,7 +313,7 @@ A very simple setup with just one directly attached CXL Type 3 Persistent Memory
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A very simple setup with just one directly attached CXL Type 3 Volatile Memory device::
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qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \
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qemu-system-x86_64 -M q35,cxl=on -m 4G,maxmem=8G,slots=8 -smp 4 \
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...
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-object memory-backend-ram,id=vmem0,share=on,size=256M \
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-device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
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@ -323,7 +323,7 @@ A very simple setup with just one directly attached CXL Type 3 Volatile Memory d
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The same volatile setup may optionally include an LSA region::
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qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 -cpu max \
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qemu-system-x86_64 -M q35,cxl=on -m 4G,maxmem=8G,slots=8 -smp 4 \
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...
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-object memory-backend-ram,id=vmem0,share=on,size=256M \
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-object memory-backend-file,id=cxl-lsa0,share=on,mem-path=/tmp/lsa.raw,size=256M \
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