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target/arm: Use vector minmax expanders for aarch32 

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190209033847.9014-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2019-02-15 09:56:40 +00:00 committed by Peter Maydell
parent 264d2a481a
commit 6f27822182
1 changed files with 19 additions and 6 deletions
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25
target/arm/translate.c
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@ -6368,6 +6368,25 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
tcg_gen_gvec_cmp(u ? TCG_COND_GEU : TCG_COND_GE, size,
rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size);
return 0;
case NEON_3R_VMAX:
if (u) {
tcg_gen_gvec_umax(size, rd_ofs, rn_ofs, rm_ofs,
vec_size, vec_size);
} else {
tcg_gen_gvec_smax(size, rd_ofs, rn_ofs, rm_ofs,
vec_size, vec_size);
}
return 0;
case NEON_3R_VMIN:
if (u) {
tcg_gen_gvec_umin(size, rd_ofs, rn_ofs, rm_ofs,
vec_size, vec_size);
} else {
tcg_gen_gvec_smin(size, rd_ofs, rn_ofs, rm_ofs,
vec_size, vec_size);
}
return 0;
}
if (size == 3) {
@ -6533,12 +6552,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
case NEON_3R_VQRSHL:
GEN_NEON_INTEGER_OP_ENV(qrshl);
break;
case NEON_3R_VMAX:
GEN_NEON_INTEGER_OP(max);
break;
case NEON_3R_VMIN:
GEN_NEON_INTEGER_OP(min);
break;
case NEON_3R_VABD:
GEN_NEON_INTEGER_OP(abd);
break;