target-ppc: Altivec 2.07: Doubleword Compares
This patch adds the Vector Compare Doubleword instructions introduced by Power ISA Version 2.07: - Vector Compare Equal to Unsigned Doubleword (vcmpequd) - Vector Compare Greater Than Signed Doubleword (vcmpgtsd) - Vector Compare Greater Than Unsigned Doubleword (vcmpgtud) These instructions are encoded with bit 31 set to 1 and so are duals with vcmpeqfp, vcmpgtfp and vcmpbfp respectively. The helper macro for integer compares is enhanced to account for 64-bit operands. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -139,12 +139,15 @@ DEF_HELPER_3(vmaxud, void, avr, avr, avr)
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DEF_HELPER_4(vcmpequb, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequh, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequw, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequd, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtub, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtuh, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtuw, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtud, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsb, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsh, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsw, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsd, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpeqfp, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgefp, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtfp, void, env, avr, avr, avr)
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@ -152,12 +155,15 @@ DEF_HELPER_4(vcmpbfp, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequb_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequh_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequw_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpequd_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtub_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtuh_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtuw_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtud_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsb_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsh_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsw_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtsd_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpeqfp_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgefp_dot, void, env, avr, avr, avr)
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DEF_HELPER_4(vcmpgtfp_dot, void, env, avr, avr, avr)
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@ -626,15 +626,18 @@ VCF(sx, int32_to_float32, s32)
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void helper_vcmp##suffix(CPUPPCState *env, ppc_avr_t *r, \
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ppc_avr_t *a, ppc_avr_t *b) \
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{ \
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uint32_t ones = (uint32_t)-1; \
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uint32_t all = ones; \
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uint32_t none = 0; \
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uint64_t ones = (uint64_t)-1; \
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uint64_t all = ones; \
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uint64_t none = 0; \
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int i; \
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\
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for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
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uint32_t result = (a->element[i] compare b->element[i] ? \
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uint64_t result = (a->element[i] compare b->element[i] ? \
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ones : 0x0); \
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switch (sizeof(a->element[0])) { \
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case 8: \
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r->u64[i] = result; \
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break; \
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case 4: \
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r->u32[i] = result; \
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break; \
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@ -658,12 +661,15 @@ VCF(sx, int32_to_float32, s32)
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VCMP(equb, ==, u8)
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VCMP(equh, ==, u16)
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VCMP(equw, ==, u32)
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VCMP(equd, ==, u64)
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VCMP(gtub, >, u8)
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VCMP(gtuh, >, u16)
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VCMP(gtuw, >, u32)
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VCMP(gtud, >, u64)
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VCMP(gtsb, >, s8)
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VCMP(gtsh, >, s16)
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VCMP(gtsw, >, s32)
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VCMP(gtsd, >, s64)
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#undef VCMP_DO
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#undef VCMP
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@ -7136,17 +7136,27 @@ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \
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GEN_VXRFORM(vcmpequb, 3, 0)
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GEN_VXRFORM(vcmpequh, 3, 1)
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GEN_VXRFORM(vcmpequw, 3, 2)
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GEN_VXRFORM(vcmpequd, 3, 3)
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GEN_VXRFORM(vcmpgtsb, 3, 12)
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GEN_VXRFORM(vcmpgtsh, 3, 13)
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GEN_VXRFORM(vcmpgtsw, 3, 14)
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GEN_VXRFORM(vcmpgtsd, 3, 15)
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GEN_VXRFORM(vcmpgtub, 3, 8)
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GEN_VXRFORM(vcmpgtuh, 3, 9)
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GEN_VXRFORM(vcmpgtuw, 3, 10)
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GEN_VXRFORM(vcmpgtud, 3, 11)
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GEN_VXRFORM(vcmpeqfp, 3, 3)
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GEN_VXRFORM(vcmpgefp, 3, 7)
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GEN_VXRFORM(vcmpgtfp, 3, 11)
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GEN_VXRFORM(vcmpbfp, 3, 15)
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GEN_VXRFORM_DUAL(vcmpeqfp, PPC_ALTIVEC, PPC_NONE, \
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vcmpequd, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXRFORM_DUAL(vcmpbfp, PPC_ALTIVEC, PPC_NONE, \
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vcmpgtsd, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXRFORM_DUAL(vcmpgtfp, PPC_ALTIVEC, PPC_NONE, \
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vcmpgtud, PPC_NONE, PPC2_ALTIVEC_207)
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#define GEN_VXFORM_SIMM(name, opc2, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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@ -10552,10 +10562,10 @@ GEN_VXRFORM(vcmpgtsw, 3, 14)
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GEN_VXRFORM(vcmpgtub, 3, 8)
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GEN_VXRFORM(vcmpgtuh, 3, 9)
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GEN_VXRFORM(vcmpgtuw, 3, 10)
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GEN_VXRFORM(vcmpeqfp, 3, 3)
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GEN_VXRFORM_DUAL(vcmpeqfp, vcmpequd, 3, 3, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM(vcmpgefp, 3, 7)
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GEN_VXRFORM(vcmpgtfp, 3, 11)
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GEN_VXRFORM(vcmpbfp, 3, 15)
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GEN_VXRFORM_DUAL(vcmpgtfp, vcmpgtud, 3, 11, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE)
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#undef GEN_VXFORM_SIMM
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#define GEN_VXFORM_SIMM(name, opc2, opc3) \
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