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ppc/pnv: fix XSCOM MMIO base address for P9 machines with multiple chips

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The PNV_XSCOM_BASE and PNV_XSCOM_SIZE macros are specific to POWER8
and they are used when the device tree is populated and the MMIO
region created, even for POWER9 chips. This is not too much of a
problem today because we don't have important devices on the second
chip, but we might have oneday (PHBs).

Fix by using the appropriate macros in case of P9.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190612174345.9799-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-06-12 19:43:44 +02:00 committed by David Gibson
parent e1a9b7d1fc
commit 709044fd2d
4 changed files with 32 additions and 14 deletions
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24
hw/ppc/pnv.c
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@ -860,6 +860,14 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
Pnv8Psi *psi8 = &chip8->psi;
Error *local_err = NULL;
/* XSCOM bridge is first */
pnv_xscom_realize(chip, PNV_XSCOM_SIZE, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
pcc->parent_realize(dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
@ -1024,6 +1032,14 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
Pnv9Psi *psi9 = &chip9->psi;
Error *local_err = NULL;
/* XSCOM bridge is first */
pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip));
pcc->parent_realize(dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
@ -1206,14 +1222,6 @@ static void pnv_chip_realize(DeviceState *dev, Error **errp)
PnvChip *chip = PNV_CHIP(dev);
Error *error = NULL;
/* XSCOM bridge */
pnv_xscom_realize(chip, &error);
if (error) {
error_propagate(errp, error);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
/* Cores */
pnv_chip_core_realize(chip, &error);
if (error) {

17
hw/ppc/pnv_xscom.c
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@ -213,17 +213,17 @@ const MemoryRegionOps pnv_xscom_ops = {
.endianness = DEVICE_BIG_ENDIAN,
};
void pnv_xscom_realize(PnvChip *chip, Error **errp)
void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(chip);
char *name;
name = g_strdup_printf("xscom-%x", chip->chip_id);
memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops,
chip, name, PNV_XSCOM_SIZE);
chip, name, size);
sysbus_init_mmio(sbd, &chip->xscom_mmio);
memory_region_init(&chip->xscom, OBJECT(chip), name, PNV_XSCOM_SIZE);
memory_region_init(&chip->xscom, OBJECT(chip), name, size);
address_space_init(&chip->xscom_as, &chip->xscom, name);
g_free(name);
}
@ -265,12 +265,19 @@ static const char compat_p9[] = "ibm,power9-xscom\0ibm,xscom";
int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
{
uint64_t reg[] = { cpu_to_be64(PNV_XSCOM_BASE(chip)),
cpu_to_be64(PNV_XSCOM_SIZE) };
uint64_t reg[2];
int xscom_offset;
ForeachPopulateArgs args;
char *name;
if (pnv_chip_is_power9(chip)) {
reg[0] = cpu_to_be64(PNV9_XSCOM_BASE(chip));
reg[1] = cpu_to_be64(PNV9_XSCOM_SIZE);
} else {
reg[0] = cpu_to_be64(PNV_XSCOM_BASE(chip));
reg[1] = cpu_to_be64(PNV_XSCOM_SIZE);
}
name = g_strdup_printf("xscom@%" PRIx64, be64_to_cpu(reg[0]));
xscom_offset = fdt_add_subnode(fdt, root_offset, name);
_FDT(xscom_offset);

3
include/hw/ppc/pnv.h
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@ -256,4 +256,7 @@ void pnv_bmc_powerdown(IPMIBmc *bmc);
#define PNV9_PSIHB_ESB_SIZE 0x0000000000010000ull
#define PNV9_PSIHB_ESB_BASE(chip) PNV9_CHIP_BASE(chip, 0x00060302031c0000ull)
#define PNV9_XSCOM_SIZE 0x0000000400000000ull
#define PNV9_XSCOM_BASE(chip) PNV9_CHIP_BASE(chip, 0x00603fc00000000ull)
#endif /* PPC_PNV_H */

2
include/hw/ppc/pnv_xscom.h
View File

@ -87,7 +87,7 @@ typedef struct PnvXScomInterfaceClass {
#define PNV9_XSCOM_XIVE_BASE 0x5013000
#define PNV9_XSCOM_XIVE_SIZE 0x300
extern void pnv_xscom_realize(PnvChip *chip, Error **errp);
extern void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
extern int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset);
extern void pnv_xscom_add_subregion(PnvChip *chip, hwaddr offset,