sm501: Add missing arbitration control register
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: d1eaf3b19c40aeb32a343a211f2b56664a67f948.1492787889.git.balaton@eik.bme.hu Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
e2ee84760e
commit
70e46ca887
@ -474,6 +474,7 @@ typedef struct SM501State {
|
||||
uint32_t gpio_31_0_control;
|
||||
uint32_t gpio_63_32_control;
|
||||
uint32_t dram_control;
|
||||
uint32_t arbitration_control;
|
||||
uint32_t irq_mask;
|
||||
uint32_t misc_timing;
|
||||
uint32_t power_mode_control;
|
||||
@ -757,6 +758,9 @@ static uint64_t sm501_system_config_read(void *opaque, hwaddr addr,
|
||||
case SM501_DRAM_CONTROL:
|
||||
ret = (s->dram_control & 0x07F107C0) | s->local_mem_size_index << 13;
|
||||
break;
|
||||
case SM501_ARBTRTN_CONTROL:
|
||||
ret = s->arbitration_control;
|
||||
break;
|
||||
case SM501_IRQ_MASK:
|
||||
ret = s->irq_mask;
|
||||
break;
|
||||
@ -809,6 +813,9 @@ static void sm501_system_config_write(void *opaque, hwaddr addr,
|
||||
/* TODO : check validity of size change */
|
||||
s->dram_control |= value & 0x7FFFFFC3;
|
||||
break;
|
||||
case SM501_ARBTRTN_CONTROL:
|
||||
s->arbitration_control = value & 0x37777777;
|
||||
break;
|
||||
case SM501_IRQ_MASK:
|
||||
s->irq_mask = value;
|
||||
break;
|
||||
@ -1422,6 +1429,7 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
|
||||
* BUS = 0 : Hitachi SH3/SH4
|
||||
*/
|
||||
s->misc_control = SM501_MISC_DAC_POWER;
|
||||
s->arbitration_control = 0x05146732;
|
||||
s->dc_panel_control = 0x00010000; /* FIFO level 3 */
|
||||
s->dc_crt_control = 0x00010000;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user