From 71255c48e7b902483b94862f4882ddd050fe8ad8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Tue, 12 Oct 2021 08:20:08 +0200 Subject: [PATCH] aspeed/smc: Add default reset values MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This simplifies the reset handler and has the benefit to remove some "bad" use of the segments array as an identifier of the controller model. Signed-off-by: Cédric Le Goater --- hw/ssi/aspeed_smc.c | 52 +++++++++++++++++++------------------ include/hw/ssi/aspeed_smc.h | 1 + 2 files changed, 28 insertions(+), 25 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index c534e9bf87..8cc7ccf455 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -196,12 +196,9 @@ * controller. These can be changed when board is initialized with the * Segment Address Registers. */ -static const AspeedSegments aspeed_2400_fmc_segments[]; static const AspeedSegments aspeed_2400_spi1_segments[]; -static const AspeedSegments aspeed_2500_fmc_segments[]; static const AspeedSegments aspeed_2500_spi1_segments[]; static const AspeedSegments aspeed_2500_spi2_segments[]; -static const AspeedSegments aspeed_2600_fmc_segments[]; #define ASPEED_SMC_FEATURE_DMA 0x1 #define ASPEED_SMC_FEATURE_DMA_GRANT 0x2 @@ -686,7 +683,11 @@ static void aspeed_smc_reset(DeviceState *d) AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s); int i; - memset(s->regs, 0, sizeof s->regs); + if (asc->resets) { + memcpy(s->regs, asc->resets, sizeof s->regs); + } else { + memset(s->regs, 0, sizeof s->regs); + } /* Unselect all peripherals */ for (i = 0; i < s->num_cs; ++i) { @@ -700,27 +701,6 @@ static void aspeed_smc_reset(DeviceState *d) asc->segment_to_reg(s, &asc->segments[i])); } - /* HW strapping flash type for the AST2600 controllers */ - if (asc->segments == aspeed_2600_fmc_segments) { - /* flash type is fixed to SPI for all */ - s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0); - s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1); - s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE2); - } - - /* HW strapping flash type for FMC controllers */ - if (asc->segments == aspeed_2500_fmc_segments) { - /* flash type is fixed to SPI for CE0 and CE1 */ - s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0); - s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1); - } - - /* HW strapping for AST2400 FMC controllers (SCU70). Let's use the - * configuration of the palmetto-bmc machine */ - if (asc->segments == aspeed_2400_fmc_segments) { - s->regs[s->r_conf] |= (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0); - } - s->snoop_index = SNOOP_OFF; s->snoop_dummies = 0; } @@ -1352,6 +1332,14 @@ static const TypeInfo aspeed_2400_smc_info = { .class_init = aspeed_2400_smc_class_init, }; +static const uint32_t aspeed_2400_fmc_resets[ASPEED_SMC_R_MAX] = { + /* + * CE0 and CE1 types are HW strapped in SCU70. Do it here to + * simplify the model. + */ + [R_CONF] = CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0, +}; + static const AspeedSegments aspeed_2400_fmc_segments[] = { { 0x20000000, 64 * MiB }, /* start address is readonly */ { 0x24000000, 32 * MiB }, @@ -1374,6 +1362,7 @@ static void aspeed_2400_fmc_class_init(ObjectClass *klass, void *data) asc->conf_enable_w0 = CONF_ENABLE_W0; asc->max_peripherals = 5; asc->segments = aspeed_2400_fmc_segments; + asc->resets = aspeed_2400_fmc_resets; asc->flash_window_base = 0x20000000; asc->flash_window_size = 0x10000000; asc->features = ASPEED_SMC_FEATURE_DMA; @@ -1424,6 +1413,11 @@ static const TypeInfo aspeed_2400_spi1_info = { .class_init = aspeed_2400_spi1_class_init, }; +static const uint32_t aspeed_2500_fmc_resets[ASPEED_SMC_R_MAX] = { + [R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 | + CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1), +}; + static const AspeedSegments aspeed_2500_fmc_segments[] = { { 0x20000000, 128 * MiB }, /* start address is readonly */ { 0x28000000, 32 * MiB }, @@ -1444,6 +1438,7 @@ static void aspeed_2500_fmc_class_init(ObjectClass *klass, void *data) asc->conf_enable_w0 = CONF_ENABLE_W0; asc->max_peripherals = 3; asc->segments = aspeed_2500_fmc_segments; + asc->resets = aspeed_2500_fmc_resets; asc->flash_window_base = 0x20000000; asc->flash_window_size = 0x10000000; asc->features = ASPEED_SMC_FEATURE_DMA; @@ -1569,6 +1564,12 @@ static void aspeed_2600_smc_reg_to_segment(const AspeedSMCState *s, } } +static const uint32_t aspeed_2600_fmc_resets[ASPEED_SMC_R_MAX] = { + [R_CONF] = (CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE0 | + CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE1 | + CONF_FLASH_TYPE_SPI << CONF_FLASH_TYPE2), +}; + static const AspeedSegments aspeed_2600_fmc_segments[] = { { 0x0, 128 * MiB }, /* start address is readonly */ { 128 * MiB, 128 * MiB }, /* default is disabled but needed for -kernel */ @@ -1589,6 +1590,7 @@ static void aspeed_2600_fmc_class_init(ObjectClass *klass, void *data) asc->conf_enable_w0 = CONF_ENABLE_W0; asc->max_peripherals = 3; asc->segments = aspeed_2600_fmc_segments; + asc->resets = aspeed_2600_fmc_resets; asc->flash_window_base = 0x20000000; asc->flash_window_size = 0x10000000; asc->features = ASPEED_SMC_FEATURE_DMA | diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index ee943228b9..a1ca0e65c4 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -98,6 +98,7 @@ struct AspeedSMCClass { uint8_t nregs_timings; uint8_t conf_enable_w0; uint8_t max_peripherals; + const uint32_t *resets; const AspeedSegments *segments; hwaddr flash_window_base; uint32_t flash_window_size;