target/arm: Mark ADR as non-streaming
Mark ADR as a non-streaming instruction, which should trap if full a64 support is not enabled in streaming mode. Removing entries from sme-fa64.decode is an easy way to see what remains to be done. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -59,7 +59,6 @@ FAIL 0001 1110 0111 1110 0000 00-- ---- ---- # FJCVTZS
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# --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset)
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# --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset)
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# --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm)
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# --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm)
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FAIL 0000 0100 --1- ---- 1010 ---- ---- ---- # ADR
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FAIL 0000 0100 --1- ---- 1011 -0-- ---- ---- # FTSSEL, FEXPA
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FAIL 0000 0100 --1- ---- 1011 -0-- ---- ---- # FTSSEL, FEXPA
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FAIL 0000 0101 --10 0001 100- ---- ---- ---- # COMPACT
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FAIL 0000 0101 --10 0001 100- ---- ---- ---- # COMPACT
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FAIL 0010 0101 --01 100- 1111 000- ---0 ---- # RDFFR, RDFFRS
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FAIL 0010 0101 --01 100- 1111 000- ---0 ---- # RDFFR, RDFFRS
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@ -1320,10 +1320,10 @@ static bool do_adr(DisasContext *s, arg_rrri *a, gen_helper_gvec_3 *fn)
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return gen_gvec_ool_zzz(s, fn, a->rd, a->rn, a->rm, a->imm);
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return gen_gvec_ool_zzz(s, fn, a->rd, a->rn, a->rm, a->imm);
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}
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}
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TRANS_FEAT(ADR_p32, aa64_sve, do_adr, a, gen_helper_sve_adr_p32)
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TRANS_FEAT_NONSTREAMING(ADR_p32, aa64_sve, do_adr, a, gen_helper_sve_adr_p32)
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TRANS_FEAT(ADR_p64, aa64_sve, do_adr, a, gen_helper_sve_adr_p64)
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TRANS_FEAT_NONSTREAMING(ADR_p64, aa64_sve, do_adr, a, gen_helper_sve_adr_p64)
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TRANS_FEAT(ADR_s32, aa64_sve, do_adr, a, gen_helper_sve_adr_s32)
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TRANS_FEAT_NONSTREAMING(ADR_s32, aa64_sve, do_adr, a, gen_helper_sve_adr_s32)
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TRANS_FEAT(ADR_u32, aa64_sve, do_adr, a, gen_helper_sve_adr_u32)
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TRANS_FEAT_NONSTREAMING(ADR_u32, aa64_sve, do_adr, a, gen_helper_sve_adr_u32)
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/*
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/*
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*** SVE Integer Misc - Unpredicated Group
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*** SVE Integer Misc - Unpredicated Group
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@ -566,4 +566,11 @@ uint64_t asimd_imm_const(uint32_t imm, int cmode, int op);
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static bool trans_##NAME(DisasContext *s, arg_##NAME *a) \
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static bool trans_##NAME(DisasContext *s, arg_##NAME *a) \
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{ return dc_isar_feature(FEAT, s) && FUNC(s, __VA_ARGS__); }
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{ return dc_isar_feature(FEAT, s) && FUNC(s, __VA_ARGS__); }
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#define TRANS_FEAT_NONSTREAMING(NAME, FEAT, FUNC, ...) \
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static bool trans_##NAME(DisasContext *s, arg_##NAME *a) \
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{ \
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s->is_nonstreaming = true; \
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return dc_isar_feature(FEAT, s) && FUNC(s, __VA_ARGS__); \
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}
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#endif /* TARGET_ARM_TRANSLATE_H */
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#endif /* TARGET_ARM_TRANSLATE_H */
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