target/arm: Move arm_pamax out of line
We will shortly share parts of this function with other portions of address translation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220301215958.157011-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -11152,6 +11152,28 @@ static uint8_t convert_stage2_attrs(CPUARMState *env, uint8_t s2attrs)
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}
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#endif /* !CONFIG_USER_ONLY */
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/* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */
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unsigned int arm_pamax(ARMCPU *cpu)
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{
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static const unsigned int pamax_map[] = {
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[0] = 32,
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[1] = 36,
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[2] = 40,
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[3] = 42,
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[4] = 44,
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[5] = 48,
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};
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unsigned int parange =
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FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
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/*
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* id_aa64mmfr0 is a read-only register so values outside of the
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* supported mappings can be considered an implementation error.
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*/
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assert(parange < ARRAY_SIZE(pamax_map));
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return pamax_map[parange];
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}
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static int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx)
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{
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if (regime_has_2_ranges(mmu_idx)) {
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@ -243,24 +243,7 @@ static inline void update_spsel(CPUARMState *env, uint32_t imm)
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* Returns the implementation defined bit-width of physical addresses.
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* The ARMv8 reference manuals refer to this as PAMax().
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*/
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static inline unsigned int arm_pamax(ARMCPU *cpu)
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{
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static const unsigned int pamax_map[] = {
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[0] = 32,
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[1] = 36,
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[2] = 40,
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[3] = 42,
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[4] = 44,
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[5] = 48,
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};
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unsigned int parange =
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FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
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/* id_aa64mmfr0 is a read-only register so values outside of the
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* supported mappings can be considered an implementation error. */
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assert(parange < ARRAY_SIZE(pamax_map));
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return pamax_map[parange];
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}
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unsigned int arm_pamax(ARMCPU *cpu);
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/* Return true if extended addresses are enabled.
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* This is always the case if our translation regime is 64 bit,
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