target/arm: Remove arm_free_cc, a64_free_cc
Translators are no longer required to free tcg temporaries. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -319,18 +319,13 @@ static void a64_test_cc(DisasCompare64 *c64, int cc)
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arm_test_cc(&c32, cc);
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/* Sign-extend the 32-bit value so that the GE/LT comparisons work
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* properly. The NE/EQ comparisons are also fine with this choice. */
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/*
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* Sign-extend the 32-bit value so that the GE/LT comparisons work
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* properly. The NE/EQ comparisons are also fine with this choice.
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*/
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c64->cond = c32.cond;
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c64->value = tcg_temp_new_i64();
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tcg_gen_ext_i32_i64(c64->value, c32.value);
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arm_free_cc(&c32);
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}
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static void a64_free_cc(DisasCompare64 *c64)
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{
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tcg_temp_free_i64(c64->value);
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}
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static void gen_rebuild_hflags(DisasContext *s)
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@ -5315,7 +5310,6 @@ static void disas_cc(DisasContext *s, uint32_t insn)
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tcg_t0 = tcg_temp_new_i32();
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arm_test_cc(&c, cond);
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tcg_gen_setcondi_i32(tcg_invert_cond(c.cond), tcg_t0, c.value, 0);
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arm_free_cc(&c);
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/* Load the arguments for the new comparison. */
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if (is_imm) {
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@ -5435,8 +5429,6 @@ static void disas_cond_select(DisasContext *s, uint32_t insn)
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tcg_gen_movcond_i64(c.cond, tcg_rd, c.value, zero, t_true, t_false);
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}
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a64_free_cc(&c);
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if (!sf) {
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tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
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}
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@ -6256,7 +6248,6 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn)
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tcg_gen_movcond_i64(c.cond, t_true, c.value, tcg_constant_i64(0),
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t_true, t_false);
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tcg_temp_free_i64(t_false);
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a64_free_cc(&c);
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/* Note that sregs & hregs write back zeros to the high bits,
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and we've already done the zero-extension. */
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@ -754,13 +754,6 @@ void arm_test_cc(DisasCompare *cmp, int cc)
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cmp->value_global = global;
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}
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void arm_free_cc(DisasCompare *cmp)
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{
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if (!cmp->value_global) {
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tcg_temp_free_i32(cmp->value);
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}
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}
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void arm_jump_cc(DisasCompare *cmp, TCGLabel *label)
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{
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tcg_gen_brcondi_i32(cmp->cond, cmp->value, 0, label);
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@ -771,7 +764,6 @@ void arm_gen_test_cc(int cc, TCGLabel *label)
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DisasCompare cmp;
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arm_test_cc(&cmp, cc);
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arm_jump_cc(&cmp, label);
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arm_free_cc(&cmp);
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}
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void gen_set_condexec(DisasContext *s)
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@ -9125,7 +9117,6 @@ static bool trans_CSEL(DisasContext *s, arg_CSEL *a)
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arm_test_cc(&c, a->fcond);
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tcg_gen_movcond_i32(c.cond, rn, c.value, zero, rn, rm);
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arm_free_cc(&c);
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store_reg(s, a->rd, rn);
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tcg_temp_free_i32(rm);
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@ -304,7 +304,6 @@ static inline void gen_a64_update_pc(DisasContext *s, target_long diff)
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#endif
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void arm_test_cc(DisasCompare *cmp, int cc);
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void arm_free_cc(DisasCompare *cmp);
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void arm_jump_cc(DisasCompare *cmp, TCGLabel *label);
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void arm_gen_test_cc(int cc, TCGLabel *label);
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MemOp pow2_align(unsigned i);
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