target: e2k: Save PC before reading it in rr{s,d}.
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8028167de5
commit
728e400620
@ -186,16 +186,6 @@ static size_t unpack_bundle(CPUE2KState *env, DisasContext *ctx)
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return 8 + GET_FIELD(hs, 4, 3) * 8;
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}
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static inline void gen_save_pc(target_ulong pc)
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{
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tcg_gen_movi_tl(e2k_cs.pc, pc);
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}
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static inline void gen_save_cpu_state(DisasContext *ctx)
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{
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gen_save_pc(ctx->pc);
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}
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static void gen_goto_tb(DisasContext *ctx, int tb_num, target_ulong pc)
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{
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if (translator_use_goto_tb(&ctx->base, pc)) {
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@ -214,7 +204,7 @@ void e2k_tr_gen_exception(DisasContext *ctx, int which)
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{
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TCGv_i32 t = tcg_const_i32(which);
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gen_save_cpu_state(ctx);
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e2k_gen_save_cpu_state(ctx);
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gen_helper_raise_exception(cpu_env, t);
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ctx->base.is_jmp = DISAS_NORETURN;
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@ -303,6 +303,16 @@ static inline TCGv e2k_get_temp(DisasContext *dc)
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return dc->ttl[dc->ttl_len++] = tcg_temp_local_new();
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}
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static inline void e2k_gen_save_pc(target_ulong pc)
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{
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tcg_gen_movi_tl(e2k_cs.pc, pc);
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}
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static inline void e2k_gen_save_cpu_state(DisasContext *ctx)
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{
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e2k_gen_save_pc(ctx->pc);
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}
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static inline void e2k_gen_lcnt_i64(TCGv_i64 ret)
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{
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tcg_gen_andi_i64(ret, e2k_cs.lsr, (1UL << 32) - 1);
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@ -1264,48 +1264,44 @@ static inline void gen_smulhd(TCGv_i64 ret, TCGv_i64 src1, TCGv_i64 src2)
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tcg_temp_free_i64(t0);
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}
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static inline void gen_rr_i64(DisasContext *ctx, int chan)
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static inline void gen_rr_i64(DisasContext *ctx, Instr *instr)
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{
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uint32_t als = ctx->bundle.als[chan];
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uint8_t state_reg = extract32(als, 16, 8);
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TCGv_i64 dst = e2k_get_temp_i64(ctx);
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TCGv_i32 t0 = tcg_const_i32(state_reg);
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TCGv_i32 t0 = tcg_const_i32(instr->src1);
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e2k_gen_save_cpu_state(ctx);
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gen_helper_state_reg_read_i64(dst, cpu_env, t0);
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set_al_result_reg64(ctx, chan, dst);
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set_al_result_reg64(ctx, instr->chan, dst);
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tcg_temp_free_i32(t0);
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}
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static inline void gen_rr_i32(DisasContext *ctx, int chan)
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static inline void gen_rr_i32(DisasContext *ctx, Instr *instr)
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{
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uint32_t als = ctx->bundle.als[chan];
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uint8_t state_reg = extract32(als, 16, 8);
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TCGv_i32 dst = e2k_get_temp_i32(ctx);
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TCGv_i32 t0 = tcg_const_i32(state_reg);
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TCGv_i32 t0 = tcg_const_i32(instr->src1);
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e2k_gen_save_cpu_state(ctx);
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gen_helper_state_reg_read_i32(dst, cpu_env, t0);
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set_al_result_reg32(ctx, chan, dst);
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set_al_result_reg32(ctx, instr->chan, dst);
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tcg_temp_free_i32(t0);
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}
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static inline void gen_rw_i64(DisasContext *ctx, int chan)
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static inline void gen_rw_i64(DisasContext *ctx, Instr *instr)
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{
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uint32_t als = ctx->bundle.als[chan];
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Src64 s2 = get_src2_i64(ctx, chan);
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TCGv_i32 t0 = tcg_const_i32(als & 0xff);
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Src64 s2 = get_src2_i64(ctx, instr->chan);
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TCGv_i32 t0 = tcg_const_i32(instr->dst);
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gen_tag_check(ctx, als >> 31, s2.tag);
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gen_tag_check(ctx, instr->sm, s2.tag);
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gen_helper_state_reg_write_i64(cpu_env, t0, s2.value);
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tcg_temp_free_i32(t0);
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}
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static inline void gen_rw_i32(DisasContext *ctx, int chan)
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static inline void gen_rw_i32(DisasContext *ctx, Instr *instr)
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{
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uint32_t als = ctx->bundle.als[chan];
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Src32 s2 = get_src2_i32(ctx, chan);
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TCGv_i32 t0 = tcg_const_i32(als & 0xff);
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Src32 s2 = get_src2_i32(ctx, instr->chan);
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TCGv_i32 t0 = tcg_const_i32(instr->dst);
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gen_tag_check(ctx, als >> 31, s2.tag);
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gen_tag_check(ctx, instr->sm, s2.tag);
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gen_helper_state_reg_write_i32(cpu_env, t0, s2.value);
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tcg_temp_free_i32(t0);
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}
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@ -2282,28 +2278,28 @@ static void execute_ext_01(DisasContext *ctx, Instr *instr)
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case 0x3c:
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if (chan == 0) {
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/* rws */
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gen_rw_i32(ctx, chan);
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gen_rw_i32(ctx, instr);
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return;
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}
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break;
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case 0x3d:
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if (chan == 0) {
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/* rwd */
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gen_rw_i64(ctx, chan);
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gen_rw_i64(ctx, instr);
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return;
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}
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break;
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case 0x3e:
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if (chan == 0) {
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/* rrs */
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gen_rr_i32(ctx, chan);
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gen_rr_i32(ctx, instr);
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return;
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}
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break;
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case 0x3f:
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if (chan == 0) {
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/* rrd */
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gen_rr_i64(ctx, chan);
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gen_rr_i64(ctx, instr);
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return;
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} else if (is_chan_25(chan)) {
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/* staaq */
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