hw/timer/etraxfs_timer: Convert to 3-phase reset (Resettable interface)
TYPE_ETRAX_FS_TIMER is a sysbus device, so its DeviceClass::reset() handler is called automatically when its qbus parent is reset (we don't need to register it manually). Convert the generic reset to a enter/hold resettable ones, and remove the qemu_register_reset() call. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-Id: <20210502163931.552675-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@ -309,9 +309,9 @@ static const MemoryRegionOps timer_ops = {
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}
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};
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static void etraxfs_timer_reset(void *opaque)
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static void etraxfs_timer_reset_enter(Object *obj, ResetType type)
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{
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ETRAXTimerState *t = opaque;
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ETRAXTimerState *t = ETRAX_TIMER(obj);
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ptimer_transaction_begin(t->ptimer_t0);
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ptimer_stop(t->ptimer_t0);
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@ -325,6 +325,12 @@ static void etraxfs_timer_reset(void *opaque)
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t->rw_wd_ctrl = 0;
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t->r_intr = 0;
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t->rw_intr_mask = 0;
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}
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static void etraxfs_timer_reset_hold(Object *obj)
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{
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ETRAXTimerState *t = ETRAX_TIMER(obj);
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qemu_irq_lower(t->irq);
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}
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@ -343,14 +349,16 @@ static void etraxfs_timer_realize(DeviceState *dev, Error **errp)
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memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t,
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"etraxfs-timer", 0x5c);
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sysbus_init_mmio(sbd, &t->mmio);
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qemu_register_reset(etraxfs_timer_reset, t);
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}
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static void etraxfs_timer_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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ResettableClass *rc = RESETTABLE_CLASS(klass);
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dc->realize = etraxfs_timer_realize;
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rc->phases.enter = etraxfs_timer_reset_enter;
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rc->phases.hold = etraxfs_timer_reset_hold;
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}
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static const TypeInfo etraxfs_timer_info = {
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