linux-user/arm: Simplify accumulating and raising fpa11 exceptions
Use bit masking instead of an if tree. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210423165413.338259-5-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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@ -228,6 +228,7 @@ static bool emulate_arm_fpa11(CPUARMState *env, uint32_t opcode)
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{
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TaskState *ts = env_cpu(env)->opaque;
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int rc = EmulateAll(opcode, &ts->fpa, env);
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int raise, enabled;
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if (rc == 0) {
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/* Illegal instruction */
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@ -240,28 +241,31 @@ static bool emulate_arm_fpa11(CPUARMState *env, uint32_t opcode)
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}
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/* FP exception */
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int arm_fpe = 0;
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rc = -rc;
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raise = 0;
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/* Translate softfloat flags to FPSR flags */
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if (-rc & float_flag_invalid) {
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arm_fpe |= BIT_IOC;
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if (rc & float_flag_invalid) {
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raise |= BIT_IOC;
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}
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if (-rc & float_flag_divbyzero) {
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arm_fpe |= BIT_DZC;
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if (rc & float_flag_divbyzero) {
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raise |= BIT_DZC;
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}
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if (-rc & float_flag_overflow) {
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arm_fpe |= BIT_OFC;
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if (rc & float_flag_overflow) {
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raise |= BIT_OFC;
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}
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if (-rc & float_flag_underflow) {
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arm_fpe |= BIT_UFC;
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if (rc & float_flag_underflow) {
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raise |= BIT_UFC;
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}
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if (-rc & float_flag_inexact) {
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arm_fpe |= BIT_IXC;
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if (rc & float_flag_inexact) {
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raise |= BIT_IXC;
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}
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/* Exception enabled? */
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FPSR fpsr = ts->fpa.fpsr;
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if (fpsr & (arm_fpe << 16)) {
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/* Accumulate unenabled exceptions */
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enabled = ts->fpa.fpsr >> 16;
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ts->fpa.fpsr |= raise & ~enabled;
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if (raise & enabled) {
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target_siginfo_t info = { };
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/*
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@ -275,24 +279,6 @@ static bool emulate_arm_fpa11(CPUARMState *env, uint32_t opcode)
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} else {
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env->regs[15] += 4;
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}
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/* Accumulate unenabled exceptions */
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if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC)) {
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fpsr |= BIT_IXC;
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}
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if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC)) {
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fpsr |= BIT_UFC;
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}
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if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC)) {
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fpsr |= BIT_OFC;
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}
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if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC)) {
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fpsr |= BIT_DZC;
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}
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if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC)) {
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fpsr |= BIT_IOC;
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}
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ts->fpa.fpsr = fpsr;
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return true;
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}
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