e2k: use i128 for qp loads and stores
This commit is contained in:
parent
4a415ddafa
commit
74364cc70f
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@ -349,5 +349,7 @@ DEF_HELPER_FLAGS_2(fxtoidtr, TCG_CALL_NO_RWG, i64, env, f80)
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DEF_HELPER_FLAGS_3(fstoifs, TCG_CALL_NO_RWG, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(fdtoifd, TCG_CALL_NO_RWG, i64, env, i64, i64)
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DEF_HELPER_FLAGS_1(stmqp_mask, TCG_CALL_NO_RWG_SE, vec, i32)
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#undef f80
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#undef vec
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@ -624,3 +624,41 @@ IMPL_QPACKED_ENV_CVT_TRUNC(qpfdtois, helper_fdtois)
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IMPL_QPACKED_ENV_CVT_TRUNC(qpfdtoistr, helper_fdtoistr)
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IMPL_QPACKED_ENV_CVT_TRUNC(qpidtofs, helper_idtofs)
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IMPL_QPACKED_ENV_CVT_TRUNC(qpfdtofs, helper_fdtofs)
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static uint32_t mask4(uint8_t bitmask)
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{
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static uint32_t map[16] = {
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0x00000000,
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0x000000ff,
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0x0000ff00,
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0x0000ffff,
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0x00ff0000,
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0x00ff00ff,
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0x00ffff00,
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0x00ffffff,
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0xff000000,
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0xff0000ff,
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0xff00ff00,
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0xff00ffff,
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0xffff0000,
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0xffff00ff,
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0xffffff00,
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0xffffffff
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};
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return map[bitmask & 15];
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}
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static inline uint64_t mask8(uint8_t bitmask)
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{
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return deposit64(mask4(bitmask), 32, 32, mask4(bitmask >> 4));
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}
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static inline Int128 mask16(uint16_t bitmask)
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{
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return int128_make128(mask8(bitmask), mask8(bitmask >> 8));
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}
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Int128 HELPER(stmqp_mask)(uint32_t bitmask)
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{
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return mask16(bitmask);
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}
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@ -4004,41 +4004,24 @@ static AlopResult gen_ld_raw_i64(Alop *alop, TCGv_i32 tag, TCGv addr,
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return gen_al_result_d(alop, r);
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}
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static void gen_qemu_ld_i128(TCGv_i64 hi, TCGv_i64 lo, TCGv addr, TCGArg idx,
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MemOp memop)
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{
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TCGv t0 = tcg_temp_new();
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tcg_gen_addi_tl(t0, addr, 8);
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if (memop & MO_BE) {
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tcg_gen_qemu_ld_i64(hi, addr, idx, memop);
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tcg_gen_qemu_ld_i64(lo, t0, idx, memop);
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} else {
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tcg_gen_qemu_ld_i64(lo, addr, idx, memop);
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tcg_gen_qemu_ld_i64(hi, t0, idx, memop);
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}
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}
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static AlopResult gen_ld_raw_i128(Alop *alop, TCGv_i32 tag, TCGv addr,
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MemOp memop, bool skip, bool save)
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{
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TCGLabel *l0 = gen_new_label();
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Tagged_i128 r = tagged_temp_new_i128();
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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if (alop->als.sm) {
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TCGLabel *l1 = gen_new_label();
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TCGv_i32 t3 = tcg_temp_new_i32();
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i32 t1 = tcg_temp_new_i32();
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gen_probe_read_access(t3, addr, 16, alop->ctx->mmuidx);
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tcg_gen_brcondi_i32(TCG_COND_NE, t3, 0, l1);
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gen_probe_read_access(t1, addr, 16, alop->ctx->mmuidx);
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tcg_gen_brcondi_i32(TCG_COND_NE, t1, 0, l1);
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/* address is not available */
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tcg_gen_movi_i32(r.tag, E2K_TAG_NON_NUMBER128);
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tcg_gen_movi_i64(t0, E2K_LD_RESULT_INVALID);
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tcg_gen_movi_i64(t1, E2K_LD_RESULT_INVALID);
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tcg_gen_concat_i64_i128(r.val, t0, t0);
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tcg_gen_br(l0);
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/* address is available */
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@ -4046,21 +4029,39 @@ static AlopResult gen_ld_raw_i128(Alop *alop, TCGv_i32 tag, TCGv addr,
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}
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gen_tag1_i128(r.tag, tag);
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gen_qemu_ld_i128(t1, t0, addr, alop->ctx->mmuidx, memop);
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tcg_gen_qemu_ld_i128(r.val, addr, alop->ctx->mmuidx, memop);
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gen_set_label(l0);
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if (save) {
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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/* save value for a further check with st+mod=2 */
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tcg_gen_extr_i128_i64(t0, t1, r.val);
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tcg_gen_mov_i64(cpu_last_val0, t0);
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tcg_gen_mov_i64(cpu_last_val1, t1);
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}
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gen_qppackdl(r.val, t1, t0);
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return gen_al_result_q(alop, r);
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}
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static void gen_atomic_cmpxchg_i64(Alop *alop, TCGv_i64 value, TCGv addr,
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static void gen_atomic_cmpxchg_mlock_i128(Alop *alop, TCGv_i128 val,
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TCGv addr, MemOp memop)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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TCGv_i128 t2 = tcg_temp_new_i128();
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tcg_gen_concat_i64_i128(t2, cpu_last_val0, cpu_last_val1);
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tcg_gen_atomic_cmpxchg_i128(t2, addr, t2, val, alop->ctx->mmuidx, memop);
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tcg_gen_extr_i128_i64(t0, t1, t2);
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tcg_gen_setcond_i64(TCG_COND_NE, t0, t0, cpu_last_val0);
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tcg_gen_setcond_i64(TCG_COND_NE, t1, t1, cpu_last_val1);
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tcg_gen_or_i64(t0, t0, t1);
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tcg_gen_extrl_i64_i32(alop->ctx->mlock, t1);
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}
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static void gen_atomic_cmpxchg_mlock_i64(Alop *alop, TCGv_i64 value, TCGv addr,
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MemOp memop)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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@ -4072,35 +4073,7 @@ static void gen_atomic_cmpxchg_i64(Alop *alop, TCGv_i64 value, TCGv addr,
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tcg_gen_extrl_i64_i32(alop->ctx->mlock, t1);
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}
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static void gen_atomic_cmpxchg_i128(Alop *alop, TCGv_i64 hi, TCGv_i64 lo,
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TCGv addr, MemOp memop)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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TCGv t2 = tcg_temp_new();
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tcg_gen_addi_tl(t2, addr, 8);
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// FIXME: temp solution
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if (memop & MO_BE) {
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tcg_gen_atomic_cmpxchg_i64(t1, addr, cpu_last_val0, hi,
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alop->ctx->mmuidx, memop);
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tcg_gen_atomic_cmpxchg_i64(t0, t2, cpu_last_val1, lo,
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alop->ctx->mmuidx, memop);
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} else {
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tcg_gen_atomic_cmpxchg_i64(t0, addr, cpu_last_val0, lo,
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alop->ctx->mmuidx, memop);
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tcg_gen_atomic_cmpxchg_i64(t1, t2, cpu_last_val1, hi,
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alop->ctx->mmuidx, memop);
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}
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tcg_gen_setcond_i64(TCG_COND_NE, t0, t0, cpu_last_val0);
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tcg_gen_setcond_i64(TCG_COND_NE, t1, t1, cpu_last_val1);
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tcg_gen_or_i64(t0, t0, t1);
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tcg_gen_extrl_i64_i32(alop->ctx->mlock, t1);
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}
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static void gen_atomic_cmpxchg_i32(Alop *alop, TCGv_i32 value, TCGv addr,
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static void gen_atomic_cmpxchg_mlock_i32(Alop *alop, TCGv_i32 value, TCGv addr,
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MemOp memop)
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{
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TCGv_i32 t0 = tcg_temp_new_i32();
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@ -4114,147 +4087,84 @@ static void gen_atomic_cmpxchg_i32(Alop *alop, TCGv_i32 value, TCGv addr,
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#define IMPL_GEN_ST(name, S, st1, st2) \
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static void name(Alop *alop, TCGv addr, \
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MemOp memop, bool skip, bool check) \
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MemOp memop, bool check) \
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{ \
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TCGLabel *l0 = gen_new_label(); \
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TCGLabel *l0 = NULL; \
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tagged(S) s4 = gen_tagged_src4(S, alop); \
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\
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if (!skip) { \
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if (alop->als.sm) { \
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TCGv_i32 t0 = tcg_temp_new_i32(); \
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TCGLabel *l1 = gen_new_label(); \
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\
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gen_probe_write_access(t0, addr, memop_size(memop), \
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alop->ctx->mmuidx); \
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tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l0); \
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\
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gen_is_poisoned_tag_or_preg(t0, s4.tag, alop->preg); \
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tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1); \
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call(S, gen_poison, s4, s4); \
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gen_set_label(l1); \
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} \
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if (alop->als.sm) { \
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TCGv_i32 t0 = tcg_temp_new_i32(); \
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TCGLabel *l1 = gen_new_label(); \
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\
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if (check && alop->ctx->mlock) { \
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st1(alop, s4.val, addr, memop); \
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} else { \
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st2(s4.val, addr, alop->ctx->mmuidx, memop); \
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} \
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l0 = gen_new_label(); \
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gen_probe_write_access(t0, addr, memop_size(memop), \
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alop->ctx->mmuidx); \
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tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l0); \
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\
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gen_is_poisoned_tag_or_preg(t0, s4.tag, alop->preg); \
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tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1); \
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call(S, gen_poison, s4, s4); \
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gen_set_label(l1); \
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} \
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\
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if (check && alop->ctx->mlock) { \
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st1(alop, s4.val, addr, memop); \
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} else { \
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st2(s4.val, addr, alop->ctx->mmuidx, memop); \
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} \
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\
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if (l0) { \
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gen_set_label(l0); \
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} \
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gen_set_label(l0); \
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}
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IMPL_GEN_ST(gen_st_raw_i32, s, gen_atomic_cmpxchg_i32, tcg_gen_qemu_st_i32)
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IMPL_GEN_ST(gen_st_raw_i64, d, gen_atomic_cmpxchg_i64, tcg_gen_qemu_st_i64)
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IMPL_GEN_ST(gen_st_raw_i32, s, gen_atomic_cmpxchg_mlock_i32, tcg_gen_qemu_st_i32)
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IMPL_GEN_ST(gen_st_raw_i64, d, gen_atomic_cmpxchg_mlock_i64, tcg_gen_qemu_st_i64)
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IMPL_GEN_ST(gen_st_raw_i128, q, gen_atomic_cmpxchg_mlock_i128, tcg_gen_qemu_st_i128)
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static void gen_qemu_st_i128(TCGv_i64 hi, TCGv_i64 lo, TCGv addr,
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TCGArg idx, MemOp memop)
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static void gen_stmqp_merge_i128(TCGv_i128 ret, TCGv_i128 a, TCGv_i128 b, TCGv_i32 mask)
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{
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TCGv t0 = tcg_temp_new();
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TCGv_i128 m = tcg_temp_new_i128();
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TCGv_i128 t0 = tcg_temp_new_i128();
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TCGv_i128 t1 = tcg_temp_new_i128();
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tcg_gen_addi_tl(t0, addr, 8);
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if (memop & MO_BE) {
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tcg_gen_qemu_st_i64(hi, addr, idx, memop);
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tcg_gen_qemu_st_i64(lo, t0, idx, memop);
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} else {
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tcg_gen_qemu_st_i64(lo, addr, idx, memop);
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tcg_gen_qemu_st_i64(hi, t0, idx, memop);
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}
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}
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static void gen_st_raw_i128(Alop *alop, TCGv addr,
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MemOp memop, bool skip, bool check)
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{
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TCGLabel *l0 = gen_new_label();
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Tagged_i128 s4 = gen_tagged_src4_q(alop);
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if (!skip) {
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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if (alop->als.sm) {
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TCGv_i32 t2 = tcg_temp_new_i32();
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gen_probe_write_access(t2, addr, 16, alop->ctx->mmuidx);
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tcg_gen_brcondi_i32(TCG_COND_EQ, t2, 0, l0);
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}
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gen_qpunpackdl(t1, t0, s4.val);
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if (check && alop->ctx->mlock) {
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gen_atomic_cmpxchg_i128(alop, t1, t0, addr, memop);
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} else {
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gen_qemu_st_i128(t1, t0, addr, alop->ctx->mmuidx, memop);
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}
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}
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gen_set_label(l0);
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}
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static void gen_mask8_i64(TCGv_i64 ret, TCGv_i64 arg)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_constant_i64(0x0101010101010101);
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tcg_gen_andi_i64(t0, arg, 0xff);
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tcg_gen_mul_i64(t0, t0, t1);
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tcg_gen_andi_i64(t0, t0, 0x8040201008040201);
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tcg_gen_addi_i64(t0, t0, 0x00406070787c7e7f);
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tcg_gen_shri_i64(t0, t0, 7);
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tcg_gen_and_i64(t0, t0, t1);
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tcg_gen_muli_i64(ret, t0, 0xff);
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}
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static void gen_pmerge_i64(TCGv_i64 ret, TCGv_i64 a, TCGv_i64 b,
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TCGv_i64 bitmask)
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{
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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TCGv_i64 t2 = tcg_temp_new_i64();
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gen_mask8_i64(t0, bitmask);
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tcg_gen_and_i64(t1, a, t0);
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gen_andn_i64(t2, b, t0);
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tcg_gen_or_i64(ret, t1, t2);
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gen_helper_stmqp_mask(m, mask);
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gen_qpand(t0, a, m);
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gen_qpandn(t1, b, m);
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gen_qpor(ret, t0, t1);
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}
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static void gen_stm_raw_i128(Alop *alop, TCGv addr,
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MemOp memop, bool skip, bool check)
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MemOp memop, bool check)
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{
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TCGLabel *l0 = gen_new_label();
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Tagged_i32 s2 = gen_tagged_src2_s(alop);
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Tagged_i128 s4 = gen_tagged_src4_q(alop);
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TCGv_i64 mask = tcg_temp_new_i64();
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TCGv_i32 mask = tcg_temp_new_i32();
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TCGv_i128 t0 = tcg_temp_new_i128();
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tcg_gen_extu_i32_i64(mask, s2.val);
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tcg_gen_andi_i64(mask, mask, 0xffff);
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tcg_gen_brcondi_i64(TCG_COND_EQ, mask, 0, l0);
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// force alignment for v5 only
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if (alop->ctx->version == 5) {
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memop |= MO_ALIGN_16;
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}
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if (!skip) {
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TCGv_i64 t0 = tcg_temp_new_i64();
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TCGv_i64 t1 = tcg_temp_new_i64();
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TCGv_i64 t2 = tcg_temp_new_i64();
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TCGv_i64 t3 = tcg_temp_new_i64();
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TCGv_i64 t4 = tcg_temp_new_i64();
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tcg_gen_andi_i32(mask, s2.val, 0xffff);
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tcg_gen_brcondi_i32(TCG_COND_EQ, mask, 0, l0);
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if (alop->als.sm) {
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TCGv_i32 t5 = tcg_temp_new_i32();
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if (alop->als.sm) {
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TCGv_i32 t5 = tcg_temp_new_i32();
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gen_probe_write_access(t5, addr, 16, alop->ctx->mmuidx);
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tcg_gen_brcondi_i32(TCG_COND_EQ, t5, 0, l0);
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}
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gen_probe_write_access(t5, addr, 16, alop->ctx->mmuidx);
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tcg_gen_brcondi_i32(TCG_COND_EQ, t5, 0, l0);
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}
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gen_qpunpackdl(t1, t0, s4.val);
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gen_qemu_ld_i128(t3, t2, addr, alop->ctx->mmuidx, memop);
|
||||
tcg_gen_shri_i64(t4, mask, 8);
|
||||
gen_pmerge_i64(t0, t0, t2, mask);
|
||||
gen_pmerge_i64(t1, t1, t3, t4);
|
||||
tcg_gen_qemu_ld_i128(t0, addr, alop->ctx->mmuidx, memop);
|
||||
gen_stmqp_merge_i128(t0, s4.val, t0, s2.val);
|
||||
|
||||
if (check && alop->ctx->mlock) {
|
||||
gen_atomic_cmpxchg_i128(alop, t1, t0, addr, memop);
|
||||
} else {
|
||||
gen_qemu_st_i128(t1, t0, addr, alop->ctx->mmuidx, memop);
|
||||
}
|
||||
if (check && alop->ctx->mlock) {
|
||||
gen_atomic_cmpxchg_mlock_i128(alop, t0, addr, memop);
|
||||
} else {
|
||||
tcg_gen_qemu_st_i128(t0, addr, alop->ctx->mmuidx, memop);
|
||||
}
|
||||
|
||||
gen_set_label(l0);
|
||||
|
|
@ -4275,7 +4185,7 @@ typedef void (*GenAddrFn)(Alop *alop, TCGv_i32 tag, TCGv addr, AddrBase base);
|
|||
typedef AlopResult (*GenLoadFn)(Alop *alop, TCGv_i32 tag, TCGv addr,
|
||||
MemOp memop, bool skip, bool save);
|
||||
typedef void (*GenStoreFn)(Alop *alop, TCGv addr,
|
||||
MemOp memop, bool skip, bool check);
|
||||
MemOp memop, bool check);
|
||||
|
||||
static AlopResult gen_alopf1_mas(Alop *alop, GenAddrFn addr_fn,
|
||||
GenLoadFn ld_fn, MemOp memop, AddrBase base)
|
||||
|
|
@ -4298,7 +4208,9 @@ static void gen_alopf3_mas(Alop *alop, GenAddrFn addr_fn,
|
|||
|
||||
memop = scan_st_mas(alop, memop, &skip, &check);
|
||||
(*addr_fn)(alop, tag, addr, base);
|
||||
(*st_fn)(alop, addr, memop, skip, check);
|
||||
if (!skip) {
|
||||
(*st_fn)(alop, addr, memop, check);
|
||||
}
|
||||
}
|
||||
|
||||
#define IMPL_GEN_ADDR(name, S, cast) \
|
||||
|
|
@ -4332,18 +4244,18 @@ IMPL_GEN_ADDR(gen_addr_i32, s, tcg_gen_ext_i32_tl)
|
|||
IMPL_GEN_ADDR_SRC1(gen_addr_src1_i64, d, tcg_gen_trunc_i64_tl)
|
||||
IMPL_GEN_ADDR_SRC1(gen_addr_src1_i32, s, tcg_gen_ext_i32_tl)
|
||||
|
||||
#define gen_ldb(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UB, b)
|
||||
#define gen_ldh(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UW, b)
|
||||
#define gen_ldw(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UL, b)
|
||||
#define gen_ldd(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UQ, b)
|
||||
#define gen_ldqp(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i128, MO_UQ, b)
|
||||
#define gen_ldb(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UB, b)
|
||||
#define gen_ldh(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UW, b)
|
||||
#define gen_ldw(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UL, b)
|
||||
#define gen_ldd(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i64, MO_UQ, b)
|
||||
#define gen_ldqp(i, a, b) gen_alopf1_mas(i, a, gen_ld_raw_i128, MO_UO, b)
|
||||
|
||||
#define gen_stb(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i32, MO_UB, b)
|
||||
#define gen_sth(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i32, MO_UW, b)
|
||||
#define gen_stw(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i32, MO_UL, b)
|
||||
#define gen_std(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i64, MO_UQ, b)
|
||||
#define gen_stqp(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i128, MO_UQ, b)
|
||||
#define gen_stmqp(i, a, b) gen_alopf3_mas(i, a, gen_stm_raw_i128, MO_UQ, b)
|
||||
#define gen_stb(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i32, MO_UB, b)
|
||||
#define gen_sth(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i32, MO_UW, b)
|
||||
#define gen_stw(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i32, MO_UL, b)
|
||||
#define gen_std(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i64, MO_UQ, b)
|
||||
#define gen_stqp(i, a, b) gen_alopf3_mas(i, a, gen_st_raw_i128, MO_UO, b)
|
||||
#define gen_stmqp(i, a, b) gen_alopf3_mas(i, a, gen_stm_raw_i128, MO_UO, b)
|
||||
|
||||
static void gen_aaurwd_aad(Alop *alop, TCGv_i64 arg1, TCGv_i32 tag)
|
||||
{
|
||||
|
|
@ -4496,11 +4408,9 @@ static void gen_staaqp(Alop *alop)
|
|||
} else {
|
||||
/* staaqp */
|
||||
int mod = mas & 0x7;
|
||||
MemOp memop = memop_from_mas(MO_UQ, mas);
|
||||
MemOp memop = memop_from_mas(MO_UO, mas);
|
||||
TCGLabel *l0 = NULL;
|
||||
TCGv t0 = tcg_temp_new();
|
||||
TCGv_i64 t1 = tcg_temp_new_i64();
|
||||
TCGv_i64 t2 = tcg_temp_new_i64();
|
||||
|
||||
if (mod != 0) {
|
||||
e2k_todo(ctx, "staaqp mod=%#x is not implemented", mod);
|
||||
|
|
@ -4515,8 +4425,7 @@ static void gen_staaqp(Alop *alop)
|
|||
tcg_gen_brcondi_i32(TCG_COND_EQ, t3, 0, l0);
|
||||
}
|
||||
|
||||
gen_qpunpackdl(t2, t1, s4.val);
|
||||
gen_qemu_st_i128(t2, t1, t0, alop->ctx->mmuidx, memop);
|
||||
tcg_gen_qemu_st_i128(s4.val, t0, alop->ctx->mmuidx, memop);
|
||||
|
||||
if (l0) {
|
||||
gen_set_label(l0);
|
||||
|
|
@ -4556,7 +4465,7 @@ static void gen_staaq(Alop *alop)
|
|||
}
|
||||
|
||||
if (alop->chan == 5) {
|
||||
// handle in alop2
|
||||
// handled in alop2
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -6843,32 +6752,24 @@ static void gen_load_prefetch_program(DisasContext *ctx)
|
|||
gen_helper_aau_load_program(tcg_env, cpu_ctprs[1]);
|
||||
}
|
||||
|
||||
static void gen_aau_result_d(DisasContext *ctx, Mova *instr,
|
||||
TCGv_i32 tag, TCGv_i64 val)
|
||||
static void gen_aau_result(DisasContext *ctx, Mova *instr, Tagged res)
|
||||
{
|
||||
uint8_t dst = instr->dst;
|
||||
|
||||
if (DST_IS_EMPTY(dst)) {
|
||||
/* %empty */
|
||||
} else if (IS_REG(dst)) {
|
||||
Tagged tmp;
|
||||
|
||||
tmp.kind = TAGGED_D;
|
||||
tmp.tag = tag;
|
||||
tmp.i64 = val;
|
||||
|
||||
gen_set_reg(ctx, &tmp, dst);
|
||||
gen_set_reg(ctx, &res, dst);
|
||||
} else {
|
||||
gen_tr_excp_illopc(ctx);
|
||||
}
|
||||
}
|
||||
|
||||
static void gen_checked_ld(DisasContext *ctx, Mova *instr, TCGv ptr)
|
||||
static void gen_mova_ld_i64(DisasContext *ctx, Mova *instr, TCGv ptr)
|
||||
{
|
||||
TCGLabel *l0 = gen_new_label();
|
||||
TCGLabel *l1 = gen_new_label();
|
||||
TCGv_i32 tag = tcg_temp_new_i32();
|
||||
TCGv_i64 val = tcg_temp_new_i64();
|
||||
Tagged res = { .kind = TAGGED_D, .t64 = tagged_temp_new_i64() };
|
||||
MemOp memop = instr->be ? MO_BE : MO_LE;
|
||||
|
||||
switch(instr->opc) {
|
||||
|
|
@ -6884,57 +6785,42 @@ static void gen_checked_ld(DisasContext *ctx, Mova *instr, TCGv ptr)
|
|||
tcg_gen_brcondi_tl(TCG_COND_NE, ptr, 0, l0);
|
||||
|
||||
/* if address is invalid */
|
||||
tcg_gen_movi_i32(tag, E2K_TAG_NON_NUMBER64);
|
||||
tcg_gen_movi_i64(val, E2K_MOVA_RESULT_INVALID);
|
||||
tcg_gen_movi_i32(res.tag, E2K_TAG_NON_NUMBER64);
|
||||
tcg_gen_movi_i64(res.i64, E2K_MOVA_RESULT_INVALID);
|
||||
tcg_gen_br(l1);
|
||||
|
||||
/* if address is valid */
|
||||
gen_set_label(l0);
|
||||
tcg_gen_movi_i32(tag, E2K_TAG_NUMBER64);
|
||||
tcg_gen_qemu_ld_i64(val, ptr, 0, memop);
|
||||
tcg_gen_movi_i32(res.tag, E2K_TAG_NUMBER64);
|
||||
tcg_gen_qemu_ld_i64(res.i64, ptr, 0, memop);
|
||||
|
||||
gen_set_label(l1);
|
||||
gen_aau_result_d(ctx, instr, tag, val);
|
||||
gen_aau_result(ctx, instr, res);
|
||||
}
|
||||
|
||||
static void gen_checked_ld_qp(DisasContext *ctx, Mova *instr, TCGv addr)
|
||||
static void gen_mova_ld_i128(DisasContext *ctx, Mova *instr, TCGv addr)
|
||||
{
|
||||
MemOp memop = (instr->be ? MO_BE : MO_LE) | MO_64;
|
||||
MemOp memop = (instr->be ? MO_BE : MO_LE) | MO_UO;
|
||||
TCGLabel *l0 = gen_new_label();
|
||||
TCGLabel *l1 = gen_new_label();
|
||||
TCGv_i32 tag = tcg_temp_new_i32();
|
||||
TCGv_i64 lo = tcg_temp_new_i64();
|
||||
TCGv_i64 hi = tcg_temp_new_i64();
|
||||
TCGv_i64 t0 = tcg_temp_new_i64();
|
||||
Tagged res = { .kind = TAGGED_Q, .t128 = tagged_temp_new_i128() };
|
||||
|
||||
tcg_gen_brcondi_tl(TCG_COND_NE, addr, 0, l0);
|
||||
|
||||
/* if address is invalid */
|
||||
tcg_gen_movi_i32(tag, E2K_TAG_NON_NUMBER128);
|
||||
tcg_gen_movi_i64(lo, E2K_MOVA_RESULT_INVALID);
|
||||
tcg_gen_movi_i64(hi, E2K_MOVA_RESULT_INVALID);
|
||||
tcg_gen_movi_i32(res.tag, E2K_TAG_NON_NUMBER128);
|
||||
tcg_gen_movi_i64(t0, E2K_MOVA_RESULT_INVALID);
|
||||
tcg_gen_concat_i64_i128(res.i128, t0, t0);
|
||||
tcg_gen_br(l1);
|
||||
|
||||
/* if address is valid */
|
||||
gen_set_label(l0);
|
||||
tcg_gen_movi_i32(tag, E2K_TAG_NUMBER128);
|
||||
gen_qemu_ld_i128(hi, lo, addr, ctx->mmuidx, memop);
|
||||
tcg_gen_movi_i32(res.tag, E2K_TAG_NUMBER128);
|
||||
tcg_gen_qemu_ld_i128(res.i128, addr, ctx->mmuidx, memop);
|
||||
|
||||
gen_set_label(l1);
|
||||
|
||||
if (DST_IS_EMPTY(instr->dst)) {
|
||||
/* %empty */
|
||||
} else if (IS_REG(instr->dst)) {
|
||||
Tagged tmp;
|
||||
|
||||
tmp.kind = TAGGED_Q;
|
||||
tmp.tag = tag;
|
||||
tmp.i128 = tcg_temp_new_i128();
|
||||
|
||||
tcg_gen_concat_i64_i128(tmp.i128, lo, hi);
|
||||
gen_set_reg(ctx, &tmp, instr->dst);
|
||||
} else {
|
||||
gen_tr_excp_illopc(ctx);
|
||||
}
|
||||
gen_aau_result(ctx, instr, res);
|
||||
}
|
||||
|
||||
static void gen_mova_ptr(TCGv ret, Mova *instr, int size, int mmu_idx)
|
||||
|
|
@ -6963,14 +6849,14 @@ static void gen_mova(DisasContext *ctx, Mova *instr)
|
|||
case 3: /* movaw */
|
||||
case 4: /* movad */
|
||||
gen_mova_ptr(t0, instr, 1 << (instr->opc - 1), ctx->mmuidx);
|
||||
gen_checked_ld(ctx, instr, t0);
|
||||
gen_mova_ld_i64(ctx, instr, t0);
|
||||
break;
|
||||
case 5: /* movaq */
|
||||
e2k_todo_illop(ctx, "movaq");
|
||||
g_assert(0 && "implement me");
|
||||
break;
|
||||
case 7: /* movaqp */
|
||||
gen_mova_ptr(t0, instr, 16, ctx->mmuidx);
|
||||
gen_checked_ld_qp(ctx, instr, t0);
|
||||
gen_mova_ld_i128(ctx, instr, t0);
|
||||
break;
|
||||
default:
|
||||
gen_tr_excp_illopc(ctx);
|
||||
|
|
|
|||
Loading…
Reference in New Issue