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i386: hvf: remove more dead emulator code 

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2017-10-03 14:10:15 +02:00
parent 6701d81d74
commit 746827825d
8 changed files with 21 additions and 60 deletions
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2
target/i386/hvf/hvf.c
View File

@ -738,7 +738,6 @@ int hvf_vcpu_exec(CPUState *cpu)
uint32_t port = exit_qual >> 16;
/*uint32_t rep = (exit_qual & 0x20) != 0;*/
#if 1
if (!string && in) {
uint64_t val = 0;
load_regs(cpu);
@ -761,7 +760,6 @@ int hvf_vcpu_exec(CPUState *cpu)
macvm_set_rip(cpu, rip + ins_len);
break;
}
#endif
struct x86_decode decode;
load_regs(cpu);

5
target/i386/hvf/x86.h
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@ -102,10 +102,6 @@ typedef struct x86_reg_flags {
};
} __attribute__ ((__packed__)) x86_reg_flags;
typedef struct x86_efer {
uint64_t efer;
} __attribute__ ((__packed__)) x86_efer;
typedef enum x86_reg_cr0 {
CR0_PE = (1L << 0),
CR0_MP = (1L << 1),
@ -305,7 +301,6 @@ struct HVFX86EmulatorState {
struct x86_register regs[16];
struct x86_reg_flags rflags;
struct lazy_flags lflags;
struct x86_efer efer;
uint8_t mmio_buf[4096];
};

22
target/i386/hvf/x86_decode.c
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@ -631,7 +631,7 @@ static void decode_aegroup(CPUX86State *env, struct x86_decode *decode)
}
break;
default:
VM_PANIC_ON_EX(1, "0xae: reg %d\n", decode->modrm.reg);
VM_PANIC_EX("0xae: reg %d\n", decode->modrm.reg);
break;
}
}
@ -655,14 +655,14 @@ static void decode_d9_4(CPUX86State *env, struct x86_decode *decode)
decode->cmd = X86_DECODE_CMD_FABS;
break;
case 0xe4:
VM_PANIC_ON_EX(1, "FTST");
VM_PANIC("FTST");
break;
case 0xe5:
/* FXAM */
decode->cmd = X86_DECODE_CMD_FXAM;
break;
default:
VM_PANIC_ON_EX(1, "FLDENV");
VM_PANIC("FLDENV");
break;
}
}
@ -671,16 +671,16 @@ static void decode_db_4(CPUX86State *env, struct x86_decode *decode)
{
switch (decode->modrm.modrm) {
case 0xe0:
VM_PANIC_ON_EX(1, "unhandled FNENI: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
VM_PANIC_EX("unhandled FNENI: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
break;
case 0xe1:
VM_PANIC_ON_EX(1, "unhandled FNDISI: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
VM_PANIC_EX("unhandled FNDISI: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
break;
case 0xe2:
VM_PANIC_ON_EX(1, "unhandled FCLEX: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
VM_PANIC_EX("unhandled FCLEX: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
break;
case 0xe3:
decode->cmd = X86_DECODE_CMD_FNINIT;
@ -689,8 +689,8 @@ static void decode_db_4(CPUX86State *env, struct x86_decode *decode)
decode->cmd = X86_DECODE_CMD_FNSETPM;
break;
default:
VM_PANIC_ON_EX(1, "unhandled fpu opcode: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
VM_PANIC_EX("unhandled fpu opcode: %x %x\n", decode->opcode[0],
decode->modrm.modrm);
break;
}
}

25
target/i386/hvf/x86_emu.c
View File

@ -837,7 +837,6 @@ void simulate_wrmsr(struct CPUState *cpu)
abort();
break;
case MSR_EFER:
env->hvf_emul->efer.efer = data;
/*printf("new efer %llx\n", EFER(cpu));*/
wvmcs(cpu->hvf_fd, VMCS_GUEST_IA32_EFER, data);
if (data & MSR_EFER_NXE) {
@ -1511,23 +1510,15 @@ bool exec_instruction(struct CPUX86State *env, struct x86_decode *ins)
printf("%d, %llx: exec_instruction %s\n", hvf_vcpu_id(cpu), RIP(cpu),
decode_cmd_to_string(ins->cmd));*/
if (0 && ins->is_fpu) {
VM_PANIC("emulate fpu\n");
} else {
if (!_cmd_handler[ins->cmd].handler) {
printf("Unimplemented handler (%llx) for %d (%x %x) \n", RIP(env),
ins->cmd, ins->opcode[0],
ins->opcode_len > 1 ? ins->opcode[1] : 0);
RIP(env) += ins->len;
return true;
}
VM_PANIC_ON_EX(!_cmd_handler[ins->cmd].handler,
"Unimplemented handler (%llx) for %d (%x %x) \n", RIP(env),
ins->cmd, ins->opcode[0],
ins->opcode_len > 1 ? ins->opcode[1] : 0);
_cmd_handler[ins->cmd].handler(env, ins);
if (!_cmd_handler[ins->cmd].handler) {
printf("Unimplemented handler (%llx) for %d (%x %x) \n", RIP(env),
ins->cmd, ins->opcode[0],
ins->opcode_len > 1 ? ins->opcode[1] : 0);
RIP(env) += ins->len;
return true;
}
_cmd_handler[ins->cmd].handler(env, ins);
return true;
}

10
target/i386/hvf/x86_flags.c
View File

@ -301,16 +301,6 @@ void set_SF(CPUX86State *env, bool val)
env->hvf_emul->lflags.auxbits ^= (temp_sf ^ val) << LF_BIT_SD;
}
void set_OSZAPC(CPUX86State *env, uint32_t flags32)
{
set_OF(env, env->hvf_emul->rflags.of);
set_SF(env, env->hvf_emul->rflags.sf);
set_ZF(env, env->hvf_emul->rflags.zf);
set_AF(env, env->hvf_emul->rflags.af);
set_PF(env, env->hvf_emul->rflags.pf);
set_CF(env, env->hvf_emul->rflags.cf);
}
void lflags_to_rflags(CPUX86State *env)
{
env->hvf_emul->rflags.cf = get_CF(env);

1
target/i386/hvf/x86_flags.h
View File

@ -190,7 +190,6 @@ bool get_SF(CPUX86State *env);
void set_SF(CPUX86State *env, bool val);
bool get_OF(CPUX86State *env);
void set_OF(CPUX86State *env, bool val);
void set_OSZAPC(CPUX86State *env, uint32_t flags32);
void SET_FLAGS_OxxxxC(CPUX86State *env, uint32_t new_of, uint32_t new_cf);

6
target/i386/hvf/x86_mmu.c
View File

@ -238,8 +238,7 @@ void vmx_write_mem(struct CPUState *cpu, addr_t gva, void *data, int bytes)
int copy = MIN(bytes, 0x1000 - (gva & 0xfff));
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_ON_EX(1, "%s: mmu_gva_to_gpa %llx failed\n", __func__,
gva);
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
} else {
address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
data, copy, 1);
@ -260,8 +259,7 @@ void vmx_read_mem(struct CPUState *cpu, void *data, addr_t gva, int bytes)
int copy = MIN(bytes, 0x1000 - (gva & 0xfff));
if (!mmu_gva_to_gpa(cpu, gva, &gpa)) {
VM_PANIC_ON_EX(1, "%s: mmu_gva_to_gpa %llx failed\n", __func__,
gva);
VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
}
address_space_rw(&address_space_memory, gpa, MEMTXATTRS_UNSPECIFIED,
data, copy, 0);

10
target/i386/hvf/x86_task.c
View File

@ -89,16 +89,6 @@ static void load_state_from_tss32(CPUState *cpu, struct x86_tss_segment32 *tss)
vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->ds}}, R_DS);
vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->fs}}, R_FS);
vmx_write_segment_selector(cpu, (x68_segment_selector){{tss->gs}}, R_GS);
#if 0
load_segment(cpu, R_LDTR, tss->ldt);
load_segment(cpu, R_ES, tss->es);
load_segment(cpu, R_CS, tss->cs);
load_segment(cpu, R_SS, tss->ss);
load_segment(cpu, R_DS, tss->ds);
load_segment(cpu, R_FS, tss->fs);
load_segment(cpu, R_GS, tss->gs);
#endif
}
static int task_switch_32(CPUState *cpu, x68_segment_selector tss_sel, x68_segment_selector old_tss_sel,