Alpha fixes (Falk Hueffner)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@157 c046a42c-6fe2-441c-8c8c-71466251a162
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366c1b8bfa
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56
dyngen.c
56
dyngen.c
@ -429,7 +429,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
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if (rel->r_offset >= offset && rel->r_offset < offset + copy_size) {
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sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
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if (!strstart(sym_name, "__op_param", &p)) {
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if (*sym_name && !strstart(sym_name, "__op_param", &p)) {
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#if defined(HOST_SPARC)
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if (sym_name[0] == '.') {
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fprintf(outfile,
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@ -561,15 +561,17 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) {
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if (rel->r_offset >= offset && rel->r_offset < offset + copy_size) {
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int type;
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sym_name = strtab + symtab[ELF64_R_SYM(rel->r_info)].st_name;
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type = ELF64_R_TYPE(rel->r_info);
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sym_name = strtab + symtab[ELF64_R_SYM(rel->r_info)].st_name;
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switch (type) {
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case R_ALPHA_GPDISP:
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/* Instructions to set up the gp can be nopped, since we keep it current
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all the time. FIXME assert that target is really gp */
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fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = 0x2ffe0000; /* unop */\n",
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/* The gp is just 32 bit, and never changes, so it's easiest to emit it
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as an immediate instead of constructing it from the pv or ra. */
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fprintf(outfile, " immediate_ldah(gen_code_ptr + %ld, gp);\n",
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rel->r_offset - offset);
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fprintf(outfile, " immediate_lda(gen_code_ptr + %ld, gp);\n",
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rel->r_offset - offset + rel->r_addend);
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break;
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case R_ALPHA_LITUSE:
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/* jsr to literal hint. Could be used to optimize to bsr. Ignore for
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@ -580,10 +582,27 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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correct for in-function jumps. */
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break;
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case R_ALPHA_LITERAL:
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/* Load a literal from the GOT relative to the gp. Need to patch the
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16-bit immediate offset. */
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fprintf(outfile, " *(int16_t *)(gen_code_ptr + %d) = gp - (long)(&%s);\n",
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rel->r_offset - offset, name);
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/* Load a literal from the GOT relative to the gp. Since there's only a
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single gp, nothing is to be done. */
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break;
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case R_ALPHA_GPRELHIGH:
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/* Handle fake relocations against __op_param symbol. Need to emit the
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high part of the immediate value instead. Other symbols need no
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special treatment. */
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if (strstart(sym_name, "__op_param", &p))
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fprintf(outfile, " immediate_ldah(gen_code_ptr + %ld, param%s);\n",
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rel->r_offset - offset, p);
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break;
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case R_ALPHA_GPRELLOW:
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if (strstart(sym_name, "__op_param", &p))
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fprintf(outfile, " immediate_lda(gen_code_ptr + %ld, param%s);\n",
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rel->r_offset - offset, p);
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break;
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case R_ALPHA_BRSGP:
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/* PC-relative jump. Tweak offset to skip the two instructions that try to
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set up the gp from the pv. */
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fprintf(outfile, " fix_bsr(gen_code_ptr + %ld, (uint8_t *) &%s - (gen_code_ptr + %ld) + 4);\n",
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rel->r_offset - offset, sym_name, rel->r_offset - offset);
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break;
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default:
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error("unsupported Alpha relocation (%d)", type);
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@ -886,7 +905,24 @@ int load_elf(const char *filename, FILE *outfile, int do_print_enum)
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} else {
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/* generate big code generation switch */
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#ifdef HOST_ALPHA
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fprintf(outfile, "register long gp asm(\"%%$29\");\n");
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fprintf(outfile,
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"register int gp asm(\"$29\");\n"
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"static inline void immediate_ldah(void *p, int val) {\n"
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" uint32_t *dest = p;\n"
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" long high = ((val >> 16) + ((val >> 15) & 1)) & 0xffff;\n"
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"\n"
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" *dest &= ~0xffff;\n"
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" *dest |= high;\n"
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" *dest |= 31 << 16;\n"
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"}\n"
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"static inline void immediate_lda(void *dest, int val) {\n"
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" *(uint16_t *) dest = val;\n"
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"}\n"
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"void fix_bsr(void *p, int offset) {\n"
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" uint32_t *dest = p;\n"
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" *dest &= ~((1 << 21) - 1);\n"
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" *dest |= (offset >> 2) & ((1 << 21) - 1);\n"
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"}\n");
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#endif
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fprintf(outfile,
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"int dyngen_code(uint8_t *gen_code_buf,\n"
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22
exec-i386.h
22
exec-i386.h
@ -105,7 +105,13 @@ register struct CPUX86State *env asm("r10");
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register unsigned int T0 asm("$9");
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register unsigned int T1 asm("$10");
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register unsigned int A0 asm("$11");
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register struct CPUX86State *env asm("$12");
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register unsigned int EAX asm("$12");
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register unsigned int ESP asm("$13");
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register unsigned int EBP asm("$14");
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register struct CPUX86State *env asm("$15");
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#define reg_EAX
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#define reg_ESP
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#define reg_EBP
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#endif
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#ifdef __ia64__
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register unsigned int T0 asm("r24");
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@ -165,10 +171,24 @@ register struct CPUX86State *env asm("r27");
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#define FP_CONVERT (env->fp_convert)
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#endif
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#ifdef __alpha__
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/* Suggested by Richard Henderson. This will result in code like
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ldah $0,__op_param1($29) !gprelhigh
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lda $0,__op_param1($0) !gprellow
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We can then conveniently change $29 to $31 and adapt the offsets to
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emit the appropriate constant. */
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extern int __op_param1 __attribute__((visibility("hidden")));
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extern int __op_param2 __attribute__((visibility("hidden")));
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extern int __op_param3 __attribute__((visibility("hidden")));
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#define PARAM1 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param1)); _r; })
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#define PARAM2 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param2)); _r; })
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#define PARAM3 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param3)); _r; })
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#else
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extern int __op_param1, __op_param2, __op_param3;
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#define PARAM1 ((long)(&__op_param1))
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#define PARAM2 ((long)(&__op_param2))
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#define PARAM3 ((long)(&__op_param3))
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#endif
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#include "cpu-i386.h"
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