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Sparc64 host support (Blue Swirl)

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2064 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2006-07-18 21:23:34 +00:00
parent 5ef54116ea
commit 74ccb34e6b
6 changed files with 84 additions and 18 deletions
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10
Makefile.target
View File

@ -112,7 +112,7 @@ CFLAGS+=-mcpu=ultrasparc -m32 -ffixed-g2 -ffixed-g3
LDFLAGS+=-m32
OP_CFLAGS=$(CFLAGS) -fno-delayed-branch -fno-omit-frame-pointer -ffixed-i0
else
CFLAGS+=-m32 -ffixed-g1 -ffixed-g2 -ffixed-g3 -ffixed-g6
CFLAGS+=-mcpu=ultrasparc -m32 -ffixed-g1 -ffixed-g2 -ffixed-g3 -ffixed-g6
LDFLAGS+=-m32
OP_CFLAGS=$(CFLAGS) -fno-delayed-branch -ffixed-i0
HELPER_CFLAGS=$(CFLAGS) -ffixed-i0 -mflat
@ -122,8 +122,9 @@ endif
endif
ifeq ($(ARCH),sparc64)
CFLAGS+=-m64 -ffixed-g1 -ffixed-g2 -ffixed-g3 -ffixed-g6
CFLAGS+=-mcpu=ultrasparc -m64 -ffixed-g1 -ffixed-g4 -ffixed-g5 -ffixed-g7
LDFLAGS+=-m64
LDFLAGS+=-Wl,-T,$(SRC_PATH)/sparc64.ld
OP_CFLAGS=$(CFLAGS) -fno-delayed-branch -ffixed-i0
endif
@ -415,6 +416,11 @@ ifeq ($(ARCH),ia64)
VL_LDFLAGS+=-Wl,-G0 -Wl,-T,$(SRC_PATH)/ia64.ld
endif
ifeq ($(ARCH),sparc64)
VL_LDFLAGS+=-m64
VL_LDFLAGS+=-Wl,-T,$(SRC_PATH)/sparc64.ld
endif
ifdef CONFIG_WIN32
SDL_LIBS := $(filter-out -mwindows, $(SDL_LIBS)) -mconsole
endif

2
cpu-all.h
View File

@ -971,7 +971,7 @@ static inline int64_t cpu_get_real_ticks(void)
return val;
}
#elif defined(__sparc__) && defined(HOST_SOLARIS)
#elif defined(__sparc_v9__)
static inline int64_t cpu_get_real_ticks (void)
{

13
dyngen-exec.h
View File

@ -35,12 +35,15 @@
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
// Linux/Sparc64 defines uint64_t
#if !(defined (__sparc_v9__) && defined(__linux__))
/* XXX may be done for all 64 bits targets ? */
#if defined (__x86_64__) || defined(__ia64)
typedef unsigned long uint64_t;
#else
typedef unsigned long long uint64_t;
#endif
#endif
/* if Solaris/__sun__, don't typedef int8_t, as it will be typedef'd
prior to this and will cause an error in compliation, conflicting
@ -50,11 +53,14 @@ typedef signed char int8_t;
#endif
typedef signed short int16_t;
typedef signed int int32_t;
// Linux/Sparc64 defines int64_t
#if !(defined (__sparc_v9__) && defined(__linux__))
#if defined (__x86_64__) || defined(__ia64)
typedef signed long int64_t;
#else
typedef signed long long int64_t;
#endif
#endif
#define INT8_MIN (-128)
#define INT16_MIN (-32767-1)
@ -128,6 +134,12 @@ extern int printf(const char *, ...);
#define AREG3 "g5"
#define AREG4 "g6"
#else
#ifdef __sparc_v9__
#define AREG0 "g1"
#define AREG1 "g4"
#define AREG2 "g5"
#define AREG3 "g7"
#else
#define AREG0 "g6"
#define AREG1 "g1"
#define AREG2 "g2"
@ -141,6 +153,7 @@ extern int printf(const char *, ...);
#define AREG10 "l6"
#define AREG11 "l7"
#endif
#endif
#define USE_FP_CONVERT
#endif
#ifdef __s390__

63
dyngen.c
View File

@ -1442,9 +1442,12 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
{
#define INSN_SAVE 0x9de3a000
#define INSN_RET 0x81c7e008
#define INSN_RETL 0x81c3e008
#define INSN_RESTORE 0x81e80000
#define INSN_RETURN 0x81cfe008
#define INSN_NOP 0x01000000
#define INSN_ADD_SP 0x9c03a000 // add %sp, nn, %sp
#define INSN_SUB_SP 0x9c23a000 // sub %sp, nn, %sp
uint32_t start_insn, end_insn1, end_insn2;
uint8_t *p;
@ -1454,18 +1457,21 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
start_insn = get32((uint32_t *)(p_start + 0x0));
end_insn1 = get32((uint32_t *)(p + 0x0));
end_insn2 = get32((uint32_t *)(p + 0x4));
if ((start_insn & ~0x1fff) == INSN_SAVE) {
if (((start_insn & ~0x1fff) == INSN_SAVE) ||
(start_insn & ~0x1fff) == INSN_ADD_SP) {
p_start += 0x4;
start_offset += 0x4;
if ((int)(start_insn | ~0x1fff) < -128)
error("Found bogus save at the start of %s", name);
if (end_insn1 == INSN_RET && end_insn2 == INSN_RESTORE)
/* SPARC v7: ret; restore; */ ;
else if (end_insn1 == INSN_RETURN && end_insn2 == INSN_NOP)
/* SPARC v9: return; nop; */ ;
else if (end_insn1 == INSN_RETL && (end_insn2 & ~0x1fff) == INSN_SUB_SP)
/* SPARC v7: retl; sub %sp, nn, %sp; */ ;
else
error("ret; restore; not found at end of %s", name);
} else if (end_insn1 == INSN_RETL && end_insn2 == INSN_NOP) {
;
} else {
error("No save at the beginning of %s", name);
}
@ -1481,21 +1487,41 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
}
#elif defined(HOST_SPARC64)
{
#define INSN_SAVE 0x9de3a000
#define INSN_RET 0x81c7e008
#define INSN_RETL 0x81c3e008
#define INSN_RESTORE 0x81e80000
#define INSN_RETURN 0x81cfe008
#define INSN_NOP 0x01000000
#define INSN_ADD_SP 0x9c03a000 // add %sp, nn, %sp
#define INSN_SUB_SP 0x9c23a000 // sub %sp, nn, %sp
uint32_t start_insn, end_insn1, end_insn2, skip_insn;
uint8_t *p;
p = (void *)(p_end - 8);
#if 0
/* XXX: check why it occurs */
if (p <= p_start)
error("empty code for %s", name);
#endif
start_insn = get32((uint32_t *)(p_start + 0x0));
end_insn1 = get32((uint32_t *)(p + 0x0));
end_insn2 = get32((uint32_t *)(p + 0x4));
if ((start_insn & ~0x1fff) == 0x9de3a000) {
if (((start_insn & ~0x1fff) == INSN_SAVE) ||
(start_insn & ~0x1fff) == INSN_ADD_SP) {
p_start += 0x4;
start_offset += 0x4;
if ((int)(start_insn | ~0x1fff) < -256)
error("Found bogus save at the start of %s", name);
if (end_insn1 != 0x81c7e008 || end_insn2 != 0x81e80000)
if (end_insn1 == INSN_RET && end_insn2 == INSN_RESTORE)
/* SPARC v7: ret; restore; */ ;
else if (end_insn1 == INSN_RETURN && end_insn2 == INSN_NOP)
/* SPARC v9: return; nop; */ ;
else if (end_insn1 == INSN_RETL && (end_insn2 & ~0x1fff) == INSN_SUB_SP)
/* SPARC v7: retl; sub %sp, nn, %sp; */ ;
else
error("ret; restore; not found at end of %s", name);
} else if (end_insn1 == INSN_RETL && end_insn2 == INSN_NOP) {
;
} else {
error("No save at the beginning of %s", name);
}
@ -2191,7 +2217,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
rel->r_offset < start_offset + copy_size) {
sym_name = strtab + symtab[ELF64_R_SYM(rel->r_info)].st_name;
get_reloc_expr(name, sizeof(name), sym_name);
type = ELF64_R_TYPE(rel->r_info);
type = ELF32_R_TYPE(rel->r_info);
addend = rel->r_addend;
reloc_offset = rel->r_offset - start_offset;
switch(type) {
@ -2215,6 +2241,15 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
" | ((%s + %d) & 0x3ff);\n",
reloc_offset, reloc_offset, name, addend);
break;
case R_SPARC_OLO10:
addend += ELF64_R_TYPE_DATA (rel->r_info);
fprintf(outfile,
" *(uint32_t *)(gen_code_ptr + %d) = "
"((*(uint32_t *)(gen_code_ptr + %d)) "
" & ~0x3ff) "
" | ((%s + %d) & 0x3ff);\n",
reloc_offset, reloc_offset, name, addend);
break;
case R_SPARC_WDISP30:
fprintf(outfile,
" *(uint32_t *)(gen_code_ptr + %d) = "
@ -2225,8 +2260,18 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
reloc_offset, reloc_offset, name, addend,
reloc_offset);
break;
case R_SPARC_WDISP22:
fprintf(outfile,
" *(uint32_t *)(gen_code_ptr + %d) = "
"((*(uint32_t *)(gen_code_ptr + %d)) "
" & ~0x3fffff) "
" | ((((%s + %d) - (long)(gen_code_ptr + %d))>>2) "
" & 0x3fffff);\n",
reloc_offset, reloc_offset, name, addend,
reloc_offset);
break;
default:
error("unsupported sparc64 relocation (%d)", type);
error("unsupported sparc64 relocation (%d) for symbol %s", type, name);
}
}
}

2
elf.h
View File

@ -227,6 +227,7 @@ typedef struct {
#define ELF64_R_SYM(i) ((i) >> 32)
#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
#define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000)
#define R_386_NONE 0
#define R_386_32 1
@ -326,6 +327,7 @@ typedef struct {
#define R_SPARC_10 30
#define R_SPARC_11 31
#define R_SPARC_64 32
#define R_SPARC_OLO10 33
#define R_SPARC_WDISP16 40
#define R_SPARC_WDISP19 41
#define R_SPARC_7 43

12
linux-user/signal.c
View File

@ -1334,28 +1334,28 @@ typedef struct {
unsigned long *insn_addr;
unsigned long insn;
} si_fpqueue [16];
} __siginfo_fpu_t;
} qemu_siginfo_fpu_t;
struct target_signal_frame {
struct sparc_stackf ss;
__siginfo_t info;
__siginfo_fpu_t *fpu_save;
qemu_siginfo_fpu_t *fpu_save;
target_ulong insns[2] __attribute__ ((aligned (8)));
target_ulong extramask[TARGET_NSIG_WORDS - 1];
target_ulong extra_size; /* Should be 0 */
__siginfo_fpu_t fpu_state;
qemu_siginfo_fpu_t fpu_state;
};
struct target_rt_signal_frame {
struct sparc_stackf ss;
siginfo_t info;
target_ulong regs[20];
sigset_t mask;
__siginfo_fpu_t *fpu_save;
qemu_siginfo_fpu_t *fpu_save;
unsigned int insns[2];
stack_t stack;
unsigned int extra_size; /* Should be 0 */
__siginfo_fpu_t fpu_state;
qemu_siginfo_fpu_t fpu_state;
};
#define UREG_O0 16
@ -1500,7 +1500,7 @@ sigsegv:
force_sig(TARGET_SIGSEGV);
}
static inline int
restore_fpu_state(CPUState *env, __siginfo_fpu_t *fpu)
restore_fpu_state(CPUState *env, qemu_siginfo_fpu_t *fpu)
{
int err;
#if 0