target/i386: Define XMMReg and access macros, align ZMM registers
This will be used for emission and endian adjustments of gvec operations. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220822223722.1697758-2-richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1233,18 +1233,34 @@ typedef struct SegmentCache {
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uint32_t flags;
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} SegmentCache;
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#define MMREG_UNION(n, bits) \
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union n { \
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uint8_t _b_##n[(bits)/8]; \
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uint16_t _w_##n[(bits)/16]; \
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uint32_t _l_##n[(bits)/32]; \
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uint64_t _q_##n[(bits)/64]; \
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float32 _s_##n[(bits)/32]; \
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float64 _d_##n[(bits)/64]; \
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}
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typedef union MMXReg {
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uint8_t _b_MMXReg[64 / 8];
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uint16_t _w_MMXReg[64 / 16];
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uint32_t _l_MMXReg[64 / 32];
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uint64_t _q_MMXReg[64 / 64];
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float32 _s_MMXReg[64 / 32];
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float64 _d_MMXReg[64 / 64];
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} MMXReg;
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typedef MMREG_UNION(ZMMReg, 512) ZMMReg;
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typedef MMREG_UNION(MMXReg, 64) MMXReg;
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typedef union XMMReg {
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uint64_t _q_XMMReg[128 / 64];
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} XMMReg;
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typedef union YMMReg {
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uint64_t _q_YMMReg[256 / 64];
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XMMReg _x_YMMReg[256 / 128];
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} YMMReg;
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typedef union ZMMReg {
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uint8_t _b_ZMMReg[512 / 8];
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uint16_t _w_ZMMReg[512 / 16];
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uint32_t _l_ZMMReg[512 / 32];
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uint64_t _q_ZMMReg[512 / 64];
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float32 _s_ZMMReg[512 / 32];
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float64 _d_ZMMReg[512 / 64];
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XMMReg _x_ZMMReg[512 / 128];
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YMMReg _y_ZMMReg[512 / 256];
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} ZMMReg;
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typedef struct BNDReg {
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uint64_t lb;
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@ -1267,6 +1283,13 @@ typedef struct BNDCSReg {
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#define ZMM_S(n) _s_ZMMReg[15 - (n)]
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#define ZMM_Q(n) _q_ZMMReg[7 - (n)]
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#define ZMM_D(n) _d_ZMMReg[7 - (n)]
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#define ZMM_X(n) _x_ZMMReg[3 - (n)]
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#define ZMM_Y(n) _y_ZMMReg[1 - (n)]
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#define XMM_Q(n) _q_XMMReg[1 - (n)]
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#define YMM_Q(n) _q_YMMReg[3 - (n)]
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#define YMM_X(n) _x_YMMReg[1 - (n)]
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#define MMX_B(n) _b_MMXReg[7 - (n)]
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#define MMX_W(n) _w_MMXReg[3 - (n)]
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@ -1279,6 +1302,13 @@ typedef struct BNDCSReg {
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#define ZMM_S(n) _s_ZMMReg[n]
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#define ZMM_Q(n) _q_ZMMReg[n]
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#define ZMM_D(n) _d_ZMMReg[n]
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#define ZMM_X(n) _x_ZMMReg[n]
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#define ZMM_Y(n) _y_ZMMReg[n]
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#define XMM_Q(n) _q_XMMReg[n]
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#define YMM_Q(n) _q_YMMReg[n]
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#define YMM_X(n) _x_YMMReg[n]
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#define MMX_B(n) _b_MMXReg[n]
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#define MMX_W(n) _w_MMXReg[n]
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@ -1556,8 +1586,8 @@ typedef struct CPUArchState {
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float_status mmx_status; /* for 3DNow! float ops */
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float_status sse_status;
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uint32_t mxcsr;
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ZMMReg xmm_regs[CPU_NB_REGS == 8 ? 8 : 32];
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ZMMReg xmm_t0;
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ZMMReg xmm_regs[CPU_NB_REGS == 8 ? 8 : 32] QEMU_ALIGNED(16);
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ZMMReg xmm_t0 QEMU_ALIGNED(16);
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MMXReg mmx_t0;
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uint64_t opmask_regs[NB_OPMASK_REGS];
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