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* Register qdev properties as class properties (Marc-André) 

* Cleanups (Philippe)
 * virtio-scsi fix (Pan Nengyuan)
 * Tweak Skylake-v3 model id (Kashyap)
 * x86 UCODE_REV support and nested live migration fix (myself)
 * Advisory mode for pvpanic (Zhenwei)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.22 (GNU/Linux)
 
 iQEcBAABAgAGBQJeK1CXAAoJEL/70l94x66DXtkIAI6W5wEY0Yme4M9Q5mGc0RV8
 uscPLg0wsg88u6xne8ucCiGymvDREym2ii/aVI0Hi5ish84ZMdCrdck9cd+llpMf
 +a3slL26AKlOW8WtYSuyAE1RdLFXngeXdwal5KtWPEExJorkDUPTbwhBzQduQK1a
 myoHHcbwdd/96v7FvKnfG8jM6KZtHPQQ0i6+6fX4PN44jaULQNjze8GIrRBEwqw5
 uCKJFQPBXiVcxKjH5/kzI1vl2hLJbF2ZGVEzX/U8OPZwyGPHIkWquURo8lvUTPfb
 ySlNTUTV2CyrN65TBRXQp/mJi44WvME5Jxlf5rNLBaYXPpL0zhmILKn5X5ya4U0=
 =TD0Y
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Register qdev properties as class properties (Marc-André)
* Cleanups (Philippe)
* virtio-scsi fix (Pan Nengyuan)
* Tweak Skylake-v3 model id (Kashyap)
* x86 UCODE_REV support and nested live migration fix (myself)
* Advisory mode for pvpanic (Zhenwei)

# gpg: Signature made Fri 24 Jan 2020 20:16:23 GMT
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (58 commits)
  build-sys: clean up flags included in the linker command line
  target/i386: Add the 'model-id' for Skylake -v3 CPU models
  qdev: use object_property_help()
  qapi/qmp: add ObjectPropertyInfo.default-value
  qom: introduce object_property_help()
  qom: simplify qmp_device_list_properties()
  vl: print default value in object help
  qdev: register properties as class properties
  qdev: move instance properties to class properties
  qdev: rename DeviceClass.props
  qdev: set properties with device_class_set_props()
  object: return self in object_ref()
  object: release all props
  object: add object_class_property_add_link()
  object: express const link with link property
  object: add direct link flag
  object: rename link "child" to "target"
  object: check strong flag with &
  object: do not free class properties
  object: add object_property_set_default
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-01-27 09:44:03 +00:00
parent ba2ed84fe6 db5adeaa84
commit 760df0d121
448 changed files with 1255 additions and 940 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.travis.yml
View File

@ -327,7 +327,7 @@ matrix:
- TEST_CMD=""
before_script:
- mkdir -p ${BUILD_DIR} && cd ${BUILD_DIR}
- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-g3 -O0 -Wno-error=stringop-truncation -fsanitize=thread -fuse-ld=gold" || { cat config.log && exit 1; }
- ${SRC_DIR}/configure ${CONFIG} --extra-cflags="-g3 -O0 -Wno-error=stringop-truncation -fsanitize=thread" --extra-ldflags="-fuse-ld=gold" || { cat config.log && exit 1; }
# Run check-tcg against linux-user

4
Makefile
View File

@ -498,7 +498,7 @@ DTC_CPPFLAGS=-I$(BUILD_DIR)/dtc -I$(SRC_PATH)/dtc -I$(SRC_PATH)/dtc/libfdt
.PHONY: dtc/all
dtc/all: .git-submodule-status dtc/libfdt dtc/tests
$(call quiet-command,$(MAKE) $(DTC_MAKE_ARGS) CPPFLAGS="$(DTC_CPPFLAGS)" CFLAGS="$(DTC_CFLAGS)" LDFLAGS="$(LDFLAGS)" ARFLAGS="$(ARFLAGS)" CC="$(CC)" AR="$(AR)" LD="$(LD)" $(SUBDIR_MAKEFLAGS) libfdt/libfdt.a,)
$(call quiet-command,$(MAKE) $(DTC_MAKE_ARGS) CPPFLAGS="$(DTC_CPPFLAGS)" CFLAGS="$(DTC_CFLAGS)" LDFLAGS="$(QEMU_LDFLAGS)" ARFLAGS="$(ARFLAGS)" CC="$(CC)" AR="$(AR)" LD="$(LD)" $(SUBDIR_MAKEFLAGS) libfdt/libfdt.a,)
dtc/%: .git-submodule-status
@mkdir -p $@
@ -525,7 +525,7 @@ slirp/all: .git-submodule-status
BUILD_DIR="$(BUILD_DIR)/slirp" \
PKG_CONFIG="$(PKG_CONFIG)" \
CC="$(CC)" AR="$(AR)" LD="$(LD)" RANLIB="$(RANLIB)" \
CFLAGS="$(QEMU_CFLAGS) $(CFLAGS)" LDFLAGS="$(LDFLAGS)")
CFLAGS="$(QEMU_CFLAGS) $(CFLAGS)" LDFLAGS="$(QEMU_LDFLAGS)")
# Compatibility gunk to keep make working across the rename of targets
# for recursion, to be removed some time after 4.1.

31
Makefile.objs
View File

@ -2,17 +2,17 @@
# Common libraries for tools and emulators
stub-obj-y = stubs/
util-obj-y = crypto/ util/ qobject/ qapi/
qom-obj-y = qom/
#######################################################################
# code used by both qemu system emulation and qemu-img
ifeq ($(call lor,$(CONFIG_SOFTMMU),$(CONFIG_TOOLS)),y)
chardev-obj-y = chardev/
#######################################################################
# authz-obj-y is code used by both qemu system emulation and qemu-img
authz-obj-y = authz/
#######################################################################
# block-obj-y is code used by both qemu system emulation and qemu-img
block-obj-y = nbd/
block-obj-y += block.o blockjob.o job.o
block-obj-y += block/ scsi/
@ -21,21 +21,12 @@ block-obj-$(CONFIG_REPLICATION) += replication.o
block-obj-m = block/
#######################################################################
# crypto-obj-y is code used by both qemu system emulation and qemu-img
crypto-obj-y = crypto/
#######################################################################
# qom-obj-y is code used by both qemu system emulation and qemu-img
qom-obj-y = qom/
#######################################################################
# io-obj-y is code used by both qemu system emulation and qemu-img
io-obj-y = io/
endif # CONFIG_SOFTMMU or CONFIG_TOOLS
######################################################################
# Target independent part of system emulation. The long term path is to
# suppress *all* target specific code in case of system emulation, i.e. a
@ -80,11 +71,9 @@ qemu-seccomp.o-libs := $(SECCOMP_LIBS)
common-obj-$(CONFIG_FDT) += device_tree.o
######################################################################
# qapi
common-obj-y += qapi/
endif
endif # CONFIG_SOFTMMU
#######################################################################
# Target-independent parts used in system and user emulation

5
accel/accel.c
View File

@ -63,6 +63,11 @@ int accel_init_machine(AccelState *accel, MachineState *ms)
return ret;
}
AccelState *current_accel(void)
{
return current_machine->accelerator;
}
void accel_setup_post(MachineState *ms)
{
AccelState *accel = ms->accelerator;

4
accel/kvm/kvm-all.c
View File

@ -164,7 +164,7 @@ static NotifierList kvm_irqchip_change_notifiers =
int kvm_get_max_memslots(void)
{
KVMState *s = KVM_STATE(current_machine->accelerator);
KVMState *s = KVM_STATE(current_accel());
return s->nr_slots;
}
@ -1848,7 +1848,7 @@ static int kvm_max_vcpu_id(KVMState *s)
bool kvm_vcpu_id_is_valid(int vcpu_id)
{
KVMState *s = KVM_STATE(current_machine->accelerator);
KVMState *s = KVM_STATE(current_accel());
return vcpu_id >= 0 && vcpu_id < kvm_max_vcpu_id(s);
}

8
accel/tcg/tcg-all.c
View File

@ -31,9 +31,9 @@
#include "sysemu/cpus.h"
#include "qemu/main-loop.h"
#include "tcg/tcg.h"
#include "include/qapi/error.h"
#include "include/qemu/error-report.h"
#include "include/hw/boards.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "hw/boards.h"
#include "qapi/qapi-builtin-visit.h"
typedef struct TCGState {
@ -124,7 +124,7 @@ static void tcg_accel_instance_init(Object *obj)
static int tcg_init(MachineState *ms)
{
TCGState *s = TCG_STATE(current_machine->accelerator);
TCGState *s = TCG_STATE(current_accel());
tcg_exec_init(s->tb_size * 1024 * 1024);
cpu_interrupt_handler = tcg_handle_interrupt;

1
audio/audio.c
View File

@ -304,6 +304,7 @@ void audio_pcm_init_info (struct audio_pcm_info *info, struct audsettings *as)
switch (as->fmt) {
case AUDIO_FORMAT_S8:
sign = 1;
/* fall through */
case AUDIO_FORMAT_U8:
mul = 1;
break;

63
configure vendored
View File

@ -126,7 +126,7 @@ compile_object() {
compile_prog() {
local_cflags="$1"
local_ldflags="$2"
do_cc $QEMU_CFLAGS $local_cflags -o $TMPE $TMPC $LDFLAGS $local_ldflags
do_cc $QEMU_CFLAGS $local_cflags -o $TMPE $TMPC $QEMU_LDFLAGS $local_ldflags
}
# symbolically link $1 to $2. Portable version of "ln -sf".
@ -523,10 +523,11 @@ for opt do
--cpu=*) cpu="$optarg"
;;
--extra-cflags=*) QEMU_CFLAGS="$QEMU_CFLAGS $optarg"
QEMU_LDFLAGS="$QEMU_LDFLAGS $optarg"
;;
--extra-cxxflags=*) QEMU_CXXFLAGS="$QEMU_CXXFLAGS $optarg"
;;
--extra-ldflags=*) LDFLAGS="$LDFLAGS $optarg"
--extra-ldflags=*) QEMU_LDFLAGS="$QEMU_LDFLAGS $optarg"
EXTRA_LDFLAGS="$optarg"
;;
--enable-debug-info) debug_info="yes"
@ -599,7 +600,6 @@ QEMU_INCLUDES="-iquote . -iquote \$(SRC_PATH) -iquote \$(SRC_PATH)/accel/tcg -iq
QEMU_INCLUDES="$QEMU_INCLUDES -iquote \$(SRC_PATH)/disas/libvixl"
if test "$debug_info" = "yes"; then
CFLAGS="-g $CFLAGS"
LDFLAGS="-g $LDFLAGS"
fi
# running configure in the source tree?
@ -845,12 +845,12 @@ Darwin)
LDFLAGS_SHARED="-bundle -undefined dynamic_lookup"
if [ "$cpu" = "x86_64" ] ; then
QEMU_CFLAGS="-arch x86_64 $QEMU_CFLAGS"
LDFLAGS="-arch x86_64 $LDFLAGS"
QEMU_LDFLAGS="-arch x86_64 $QEMU_LDFLAGS"
fi
cocoa="yes"
audio_drv_list="coreaudio try-sdl"
audio_possible_drivers="coreaudio sdl"
LDFLAGS="-framework CoreFoundation -framework IOKit $LDFLAGS"
QEMU_LDFLAGS="-framework CoreFoundation -framework IOKit $QEMU_LDFLAGS"
libs_softmmu="-F/System/Library/Frameworks -framework Cocoa -framework IOKit $libs_softmmu"
# Disable attempts to use ObjectiveC features in os/object.h since they
# won't work when we're compiling with gcc as a C compiler.
@ -1025,7 +1025,7 @@ for opt do
;;
--static)
static="yes"
LDFLAGS="-static $LDFLAGS"
QEMU_LDFLAGS="-static $QEMU_LDFLAGS"
QEMU_PKG_CONFIG_FLAGS="--static $QEMU_PKG_CONFIG_FLAGS"
;;
--mandir=*) mandir="$optarg"
@ -1551,42 +1551,42 @@ done
case "$cpu" in
ppc)
CPU_CFLAGS="-m32"
LDFLAGS="-m32 $LDFLAGS"
QEMU_LDFLAGS="-m32 $QEMU_LDFLAGS"
;;
ppc64)
CPU_CFLAGS="-m64"
LDFLAGS="-m64 $LDFLAGS"
QEMU_LDFLAGS="-m64 $QEMU_LDFLAGS"
;;
sparc)
CPU_CFLAGS="-m32 -mv8plus -mcpu=ultrasparc"
LDFLAGS="-m32 -mv8plus $LDFLAGS"
QEMU_LDFLAGS="-m32 -mv8plus $QEMU_LDFLAGS"
;;
sparc64)
CPU_CFLAGS="-m64 -mcpu=ultrasparc"
LDFLAGS="-m64 $LDFLAGS"
QEMU_LDFLAGS="-m64 $QEMU_LDFLAGS"
;;
s390)
CPU_CFLAGS="-m31"
LDFLAGS="-m31 $LDFLAGS"
QEMU_LDFLAGS="-m31 $QEMU_LDFLAGS"
;;
s390x)
CPU_CFLAGS="-m64"
LDFLAGS="-m64 $LDFLAGS"
QEMU_LDFLAGS="-m64 $QEMU_LDFLAGS"
;;
i386)
CPU_CFLAGS="-m32"
LDFLAGS="-m32 $LDFLAGS"
QEMU_LDFLAGS="-m32 $QEMU_LDFLAGS"
;;
x86_64)
# ??? Only extremely old AMD cpus do not have cmpxchg16b.
# If we truly care, we should simply detect this case at
# runtime and generate the fallback to serial emulation.
CPU_CFLAGS="-m64 -mcx16"
LDFLAGS="-m64 $LDFLAGS"
QEMU_LDFLAGS="-m64 $QEMU_LDFLAGS"
;;
x32)
CPU_CFLAGS="-mx32"
LDFLAGS="-mx32 $LDFLAGS"
QEMU_LDFLAGS="-mx32 $QEMU_LDFLAGS"
;;
# No special flags required for other host CPUs
esac
@ -1967,6 +1967,7 @@ EOF
if do_cc $QEMU_CFLAGS -Werror $flag -c -o $TMPO $TMPC &&
compile_prog "-Werror $flag" ""; then
QEMU_CFLAGS="$QEMU_CFLAGS $flag"
QEMU_LDFLAGS="$QEMU_LDFLAGS $flag"
sp_on=1
break
fi
@ -2051,10 +2052,10 @@ EOF
if compile_prog "-fPIE -DPIE" "-pie"; then
QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS"
LDFLAGS="-pie $LDFLAGS"
QEMU_LDFLAGS="-pie $QEMU_LDFLAGS"
pie="yes"
if compile_prog "" "-Wl,-z,relro -Wl,-z,now" ; then
LDFLAGS="-Wl,-z,relro -Wl,-z,now $LDFLAGS"
QEMU_LDFLAGS="-Wl,-z,relro -Wl,-z,now $QEMU_LDFLAGS"
fi
else
if test "$pie" = "yes"; then
@ -4095,6 +4096,8 @@ if test "$fdt_required" = "yes"; then
"targets which need it (by specifying a cut down --target-list)."
fi
fdt=yes
elif test "$fdt" != "yes" ; then
fdt=no
fi
if test "$fdt" != "no" ; then
@ -5854,7 +5857,7 @@ EOF
hvf='no'
else
hvf='yes'
LDFLAGS="-framework Hypervisor $LDFLAGS"
QEMU_LDFLAGS="-framework Hypervisor $QEMU_LDFLAGS"
fi
fi
@ -6088,8 +6091,8 @@ esac
write_c_skeleton
if test "$gcov" = "yes" ; then
CFLAGS="-fprofile-arcs -ftest-coverage -g $CFLAGS"
LDFLAGS="-fprofile-arcs -ftest-coverage $LDFLAGS"
QEMU_CFLAGS="-fprofile-arcs -ftest-coverage -g $QEMU_CFLAGS"
QEMU_LDFLAGS="-fprofile-arcs -ftest-coverage $QEMU_LDFLAGS"
elif test "$fortify_source" = "yes" ; then
CFLAGS="-O2 -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 $CFLAGS"
elif test "$debug" = "no"; then
@ -6097,7 +6100,8 @@ elif test "$debug" = "no"; then
fi
if test "$have_asan" = "yes"; then
CFLAGS="-fsanitize=address $CFLAGS"
QEMU_CFLAGS="-fsanitize=address $QEMU_CFLAGS"
QEMU_LDFLAGS="-fsanitize=address $QEMU_LDFLAGS"
if test "$have_asan_iface_h" = "no" ; then
echo "ASAN build enabled, but ASAN header missing." \
"Without code annotation, the report may be inferior."
@ -6107,7 +6111,8 @@ if test "$have_asan" = "yes"; then
fi
fi
if test "$have_ubsan" = "yes"; then
CFLAGS="-fsanitize=undefined $CFLAGS"
QEMU_CFLAGS="-fsanitize=undefined $QEMU_CFLAGS"
QEMU_LDFLAGS="-fsanitize=undefined $QEMU_LDFLAGS"
fi
##########################################
@ -6142,7 +6147,7 @@ fi
if test "$solaris" = "no" ; then
if $ld --version 2>/dev/null | grep "GNU ld" >/dev/null 2>/dev/null ; then
LDFLAGS="-Wl,--warn-common $LDFLAGS"
QEMU_LDFLAGS="-Wl,--warn-common $QEMU_LDFLAGS"
fi
fi
@ -6157,7 +6162,7 @@ fi
if test "$mingw32" = "yes" ; then
for flag in --dynamicbase --no-seh --nxcompat; do
if ld_has $flag ; then
LDFLAGS="-Wl,$flag $LDFLAGS"
QEMU_LDFLAGS="-Wl,$flag $QEMU_LDFLAGS"
fi
done
fi
@ -6392,7 +6397,7 @@ EOF
update_cxxflags
if do_cxx $QEMU_CXXFLAGS -o $TMPE $TMPCXX $TMPO $LDFLAGS; then
if do_cxx $QEMU_CXXFLAGS -o $TMPE $TMPCXX $TMPO $QEMU_LDFLAGS; then
# C++ compiler $cxx works ok with C compiler $cc
:
else
@ -6444,7 +6449,6 @@ echo "Objective-C compiler $objcc"
echo "ARFLAGS $ARFLAGS"
echo "CFLAGS $CFLAGS"
echo "QEMU_CFLAGS $QEMU_CFLAGS"
echo "LDFLAGS $LDFLAGS"
echo "QEMU_LDFLAGS $QEMU_LDFLAGS"
echo "make $make"
echo "install $install"
@ -7502,9 +7506,8 @@ if test "$sparse" = "yes" ; then
echo "HOST_CC := REAL_CC=\"\$(HOST_CC)\" cgcc" >> $config_host_mak
echo "QEMU_CFLAGS += -Wbitwise -Wno-transparent-union -Wno-old-initializer -Wno-non-pointer-null" >> $config_host_mak
fi
echo "LDFLAGS=$LDFLAGS" >> $config_host_mak
echo "LDFLAGS_NOPIE=$LDFLAGS_NOPIE" >> $config_host_mak
echo "QEMU_LDFLAGS=$QEMU_LDFLAGS" >> $config_host_mak
echo "LDFLAGS_NOPIE=$LDFLAGS_NOPIE" >> $config_host_mak
echo "LD_REL_FLAGS=$LD_REL_FLAGS" >> $config_host_mak
echo "LD_I386_EMULATION=$ld_i386_emulation" >> $config_host_mak
echo "LIBS+=$LIBS" >> $config_host_mak
@ -7830,7 +7833,7 @@ if test "$target_bsd_user" = "yes" ; then
fi
# generate QEMU_CFLAGS/LDFLAGS for targets
# generate QEMU_CFLAGS/QEMU_LDFLAGS for targets
cflags=""
ldflags=""
@ -7951,7 +7954,7 @@ if test "$TARGET_ARCH" = "s390x" && test "$target_softmmu" = "yes" && \
fi
fi
echo "LDFLAGS+=$ldflags" >> $config_target_mak
echo "QEMU_LDFLAGS+=$ldflags" >> $config_target_mak
echo "QEMU_CFLAGS+=$cflags" >> $config_target_mak
done # for target in $targets

18
docs/specs/pvpanic.txt
View File

@ -16,8 +16,13 @@ pvpanic exposes a single I/O port, by default 0x505. On read, the bits
recognized by the device are set. Software should ignore bits it doesn't
recognize. On write, the bits not recognized by the device are ignored.
Software should set only bits both itself and the device recognize.
Currently, only bit 0 is recognized, setting it indicates a guest panic
has happened.
Bit Definition
--------------
bit 0: a guest panic has happened and should be processed by the host
bit 1: a guest panic has happened and will be handled by the guest;
the host should record it or report it, but should not affect
the execution of the guest.
ACPI Interface
--------------
@ -26,13 +31,12 @@ pvpanic device is defined with ACPI ID "QEMU0001". Custom methods:
RDPT: To determine whether guest panic notification is supported.
Arguments: None
Return: Returns a byte, bit 0 set to indicate guest panic
notification is supported. Other bits are reserved and
should be ignored.
Return: Returns a byte, with the same semantics as the I/O port
interface.
WRPT: To send a guest panic event
Arguments: Arg0 is a byte, with bit 0 set to indicate guest panic has
happened. Other bits are reserved and should be cleared.
Arguments: Arg0 is a byte to be written, with the same semantics as
the I/O interface.
Return: None
The ACPI device will automatically refer to the right port in case it

2
hw/9pfs/virtio-9p-device.c
View File

@ -246,7 +246,7 @@ static void virtio_9p_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
dc->props = virtio_9p_properties;
device_class_set_props(dc, virtio_9p_properties);
dc->vmsd = &vmstate_virtio_9p;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
vdc->realize = virtio_9p_device_realize;

2
hw/acpi/generic_event_device.c
View File

@ -282,7 +282,7 @@ static void acpi_ged_class_init(ObjectClass *class, void *data)
AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(class);
dc->desc = "ACPI Generic Event Device";
dc->props = acpi_ged_properties;
device_class_set_props(dc, acpi_ged_properties);
dc->vmsd = &vmstate_acpi_ged;
hc->plug = acpi_ged_device_plug_cb;

2
hw/acpi/piix4.c
View File

@ -653,7 +653,7 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data)
dc->reset = piix4_pm_reset;
dc->desc = "PM";
dc->vmsd = &vmstate_acpi;
dc->props = piix4_pm_properties;
device_class_set_props(dc, piix4_pm_properties);
/*
* Reason: part of PIIX4 southbridge, needs to be wired up,
* e.g. by mips_malta_init()

2
hw/acpi/vmgenid.c
View File

@ -226,7 +226,7 @@ static void vmgenid_device_class_init(ObjectClass *klass, void *data)
dc->vmsd = &vmstate_vmgenid;
dc->realize = vmgenid_realize;
dc->props = vmgenid_device_properties;
device_class_set_props(dc, vmgenid_device_properties);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}

2
hw/arm/armsse.c
View File

@ -1283,7 +1283,7 @@ static void armsse_class_init(ObjectClass *klass, void *data)
dc->realize = armsse_realize;
dc->vmsd = &armsse_vmstate;
dc->props = info->props;
device_class_set_props(dc, info->props);
dc->reset = armsse_reset;
iic->check = armsse_idau_check;
asc->info = info;

4
hw/arm/armv7m.c
View File

@ -288,7 +288,7 @@ static void armv7m_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = armv7m_realize;
dc->props = armv7m_properties;
device_class_set_props(dc, armv7m_properties);
}
static const TypeInfo armv7m_info = {
@ -367,7 +367,7 @@ static void bitband_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = bitband_realize;
dc->props = bitband_properties;
device_class_set_props(dc, bitband_properties);
}
static const TypeInfo bitband_info = {

2
hw/arm/aspeed_soc.c
View File

@ -449,7 +449,7 @@ static void aspeed_soc_class_init(ObjectClass *oc, void *data)
dc->realize = aspeed_soc_realize;
/* Reason: Uses serial_hds and nd_table in realize() directly */
dc->user_creatable = false;
dc->props = aspeed_soc_properties;
device_class_set_props(dc, aspeed_soc_properties);
}
static const TypeInfo aspeed_soc_type_info = {

2
hw/arm/bcm2836.c
View File

@ -180,7 +180,7 @@ static void bcm283x_class_init(ObjectClass *oc, void *data)
bc->info = data;
dc->realize = bcm2836_realize;
dc->props = bcm2836_props;
device_class_set_props(dc, bcm2836_props);
/* Reason: Must be wired up in code (see raspi_init() function) */
dc->user_creatable = false;
}

2
hw/arm/integratorcp.c
View File

@ -673,7 +673,7 @@ static void core_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = core_properties;
device_class_set_props(dc, core_properties);
dc->realize = integratorcm_realize;
dc->vmsd = &vmstate_integratorcm;
}

2
hw/arm/msf2-soc.c
View File

@ -229,7 +229,7 @@ static void m2sxxx_soc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = m2sxxx_soc_realize;
dc->props = m2sxxx_soc_properties;
device_class_set_props(dc, m2sxxx_soc_properties);
}
static const TypeInfo m2sxxx_soc_info = {

2
hw/arm/musicpal.c
View File

@ -435,7 +435,7 @@ static void mv88w8618_eth_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &mv88w8618_eth_vmsd;
dc->props = mv88w8618_eth_properties;
device_class_set_props(dc, mv88w8618_eth_properties);
dc->realize = mv88w8618_eth_realize;
}

2
hw/arm/nrf51_soc.c
View File

@ -224,7 +224,7 @@ static void nrf51_soc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = nrf51_soc_realize;
dc->props = nrf51_soc_properties;
device_class_set_props(dc, nrf51_soc_properties);
}
static const TypeInfo nrf51_soc_info = {

4
hw/arm/pxa2xx.c
View File

@ -1531,7 +1531,7 @@ static void pxa2xx_i2c_class_init(ObjectClass *klass, void *data)
dc->desc = "PXA2xx I2C Bus Controller";
dc->vmsd = &vmstate_pxa2xx_i2c;
dc->props = pxa2xx_i2c_properties;
device_class_set_props(dc, pxa2xx_i2c_properties);
}
static const TypeInfo pxa2xx_i2c_info = {
@ -2015,7 +2015,7 @@ static void pxa2xx_fir_class_init(ObjectClass *klass, void *data)
dc->realize = pxa2xx_fir_realize;
dc->vmsd = &pxa2xx_fir_vmsd;
dc->props = pxa2xx_fir_properties;
device_class_set_props(dc, pxa2xx_fir_properties);
dc->reset = pxa2xx_fir_reset;
}

2
hw/arm/pxa2xx_gpio.c
View File

@ -347,7 +347,7 @@ static void pxa2xx_gpio_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->desc = "PXA2xx GPIO controller";
dc->props = pxa2xx_gpio_properties;
device_class_set_props(dc, pxa2xx_gpio_properties);
dc->vmsd = &vmstate_pxa2xx_gpio_regs;
dc->realize = pxa2xx_gpio_realize;
}

2
hw/arm/smmu-common.c
View File

@ -461,7 +461,7 @@ static void smmu_base_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
SMMUBaseClass *sbc = ARM_SMMU_CLASS(klass);
dc->props = smmu_dev_properties;
device_class_set_props(dc, smmu_dev_properties);
device_class_set_parent_realize(dc, smmu_base_realize,
&sbc->parent_realize);
dc->reset = smmu_base_reset;

2
hw/arm/spitz.c
View File

@ -1083,7 +1083,7 @@ static void sl_nand_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_sl_nand_info;
dc->props = sl_nand_properties;
device_class_set_props(dc, sl_nand_properties);
dc->realize = sl_nand_realize;
/* Reason: init() method uses drive_get() */
dc->user_creatable = false;

2
hw/arm/stm32f205_soc.c
View File

@ -207,7 +207,7 @@ static void stm32f205_soc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = stm32f205_soc_realize;
dc->props = stm32f205_soc_properties;
device_class_set_props(dc, stm32f205_soc_properties);
}
static const TypeInfo stm32f205_soc_info = {

2
hw/arm/stm32f405_soc.c
View File

@ -282,7 +282,7 @@ static void stm32f405_soc_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = stm32f405_soc_realize;
dc->props = stm32f405_soc_properties;
device_class_set_props(dc, stm32f405_soc_properties);
/* No vmstate or reset required: device has no internal state */
}

2
hw/arm/strongarm.c
View File

@ -1327,7 +1327,7 @@ static void strongarm_uart_class_init(ObjectClass *klass, void *data)
dc->desc = "StrongARM UART controller";
dc->reset = strongarm_uart_reset;
dc->vmsd = &vmstate_strongarm_uart_regs;
dc->props = strongarm_uart_properties;
device_class_set_props(dc, strongarm_uart_properties);
dc->realize = strongarm_uart_realize;
}

2
hw/arm/xlnx-versal.c
View File

@ -305,7 +305,7 @@ static void versal_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = versal_realize;
dc->props = versal_properties;
device_class_set_props(dc, versal_properties);
/* No VMSD since we haven't got any top-level SoC state to save. */
}

2
hw/arm/xlnx-zynqmp.c
View File

@ -657,7 +657,7 @@ static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
dc->props = xlnx_zynqmp_props;
device_class_set_props(dc, xlnx_zynqmp_props);
dc->realize = xlnx_zynqmp_realize;
/* Reason: Uses serial_hds in realize function, thus can't be used twice */
dc->user_creatable = false;

2
hw/audio/ac97.c
View File

@ -1420,7 +1420,7 @@ static void ac97_class_init (ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "Intel 82801AA AC97 Audio";
dc->vmsd = &vmstate_ac97;
dc->props = ac97_properties;
device_class_set_props(dc, ac97_properties);
dc->reset = ac97_on_reset;
}

2
hw/audio/adlib.c
View File

@ -312,7 +312,7 @@ static void adlib_class_initfn (ObjectClass *klass, void *data)
dc->realize = adlib_realizefn;
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = ADLIB_DESC;
dc->props = adlib_properties;
device_class_set_props(dc, adlib_properties);
}
static const TypeInfo adlib_info = {

2
hw/audio/cs4231.c
View File

@ -168,7 +168,7 @@ static void cs4231_class_init(ObjectClass *klass, void *data)
dc->reset = cs_reset;
dc->vmsd = &vmstate_cs4231;
dc->props = cs4231_properties;
device_class_set_props(dc, cs4231_properties);
}
static const TypeInfo cs4231_info = {

2
hw/audio/cs4231a.c
View File

@ -706,7 +706,7 @@ static void cs4231a_class_initfn (ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "Crystal Semiconductor CS4231A";
dc->vmsd = &vmstate_cs4231a;
dc->props = cs4231a_properties;
device_class_set_props(dc, cs4231a_properties);
}
static const TypeInfo cs4231a_info = {

2
hw/audio/es1370.c
View File

@ -908,7 +908,7 @@ static void es1370_class_init (ObjectClass *klass, void *data)
dc->desc = "ENSONIQ AudioPCI ES1370";
dc->vmsd = &vmstate_es1370;
dc->reset = es1370_on_reset;
dc->props = es1370_properties;
device_class_set_props(dc, es1370_properties);
}
static const TypeInfo es1370_info = {

2
hw/audio/gus.c
View File

@ -315,7 +315,7 @@ static void gus_class_initfn (ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "Gravis Ultrasound GF1";
dc->vmsd = &vmstate_gus;
dc->props = gus_properties;
device_class_set_props(dc, gus_properties);
}
static const TypeInfo gus_info = {

2
hw/audio/hda-codec.c
View File

@ -892,7 +892,7 @@ static void hda_audio_base_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->reset = hda_audio_reset;
dc->vmsd = &vmstate_hda_audio;
dc->props = hda_audio_properties;
device_class_set_props(dc, hda_audio_properties);
}
static const TypeInfo hda_audio_info = {

4
hw/audio/intel-hda.c
View File

@ -1233,7 +1233,7 @@ static void intel_hda_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_MULTIMEDIA_HD_AUDIO;
dc->reset = intel_hda_reset;
dc->vmsd = &vmstate_intel_hda;
dc->props = intel_hda_properties;
device_class_set_props(dc, intel_hda_properties);
}
static void intel_hda_class_init_ich6(ObjectClass *klass, void *data)
@ -1289,7 +1289,7 @@ static void hda_codec_device_class_init(ObjectClass *klass, void *data)
k->unrealize = hda_codec_dev_unrealize;
set_bit(DEVICE_CATEGORY_SOUND, k->categories);
k->bus_type = TYPE_HDA_BUS;
k->props = hda_props;
device_class_set_props(k, hda_props);
}
static const TypeInfo hda_codec_device_type_info = {

2
hw/audio/milkymist-ac97.c
View File

@ -342,7 +342,7 @@ static void milkymist_ac97_class_init(ObjectClass *klass, void *data)
dc->realize = milkymist_ac97_realize;
dc->reset = milkymist_ac97_reset;
dc->vmsd = &vmstate_milkymist_ac97;
dc->props = milkymist_ac97_properties;
device_class_set_props(dc, milkymist_ac97_properties);
}
static const TypeInfo milkymist_ac97_info = {

2
hw/audio/pcspk.c
View File

@ -222,7 +222,7 @@ static void pcspk_class_initfn(ObjectClass *klass, void *data)
dc->realize = pcspk_realizefn;
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->vmsd = &vmstate_spk;
dc->props = pcspk_properties;
device_class_set_props(dc, pcspk_properties);
/* Reason: realize sets global pcspk_state */
/* Reason: pit object link */
dc->user_creatable = false;

2
hw/audio/pl041.c
View File

@ -640,7 +640,7 @@ static void pl041_device_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->reset = pl041_device_reset;
dc->vmsd = &vmstate_pl041;
dc->props = pl041_device_properties;
device_class_set_props(dc, pl041_device_properties);
}
static const TypeInfo pl041_device_info = {

2
hw/audio/sb16.c
View File

@ -1439,7 +1439,7 @@ static void sb16_class_initfn (ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
dc->desc = "Creative Sound Blaster 16";
dc->vmsd = &vmstate_sb16;
dc->props = sb16_properties;
device_class_set_props(dc, sb16_properties);
}
static const TypeInfo sb16_info = {

2
hw/audio/wm8750.c
View File

@ -717,7 +717,7 @@ static void wm8750_class_init(ObjectClass *klass, void *data)
sc->recv = wm8750_rx;
sc->send = wm8750_tx;
dc->vmsd = &vmstate_wm8750;
dc->props = wm8750_properties;
device_class_set_props(dc, wm8750_properties);
}
static const TypeInfo wm8750_info = {

8
hw/block/fdc.c
View File

@ -606,7 +606,7 @@ static void floppy_drive_class_init(ObjectClass *klass, void *data)
k->realize = floppy_drive_realize;
set_bit(DEVICE_CATEGORY_STORAGE, k->categories);
k->bus_type = TYPE_FLOPPY_BUS;
k->props = floppy_drive_properties;
device_class_set_props(k, floppy_drive_properties);
k->desc = "virtual floppy drive";
}
@ -2827,7 +2827,7 @@ static void isabus_fdc_class_init(ObjectClass *klass, void *data)
dc->fw_name = "fdc";
dc->reset = fdctrl_external_reset_isa;
dc->vmsd = &vmstate_isa_fdc;
dc->props = isa_fdc_properties;
device_class_set_props(dc, isa_fdc_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@ -2880,7 +2880,7 @@ static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = sysbus_fdc_properties;
device_class_set_props(dc, sysbus_fdc_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}
@ -2906,7 +2906,7 @@ static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = sun4m_fdc_properties;
device_class_set_props(dc, sun4m_fdc_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}

2
hw/block/m25p80.c
View File

@ -1391,7 +1391,7 @@ static void m25p80_class_init(ObjectClass *klass, void *data)
k->set_cs = m25p80_cs;
k->cs_polarity = SSI_CS_LOW;
dc->vmsd = &vmstate_m25p80;
dc->props = m25p80_properties;
device_class_set_props(dc, m25p80_properties);
dc->reset = m25p80_reset;
mc->pi = data;
}

2
hw/block/nand.c
View File

@ -448,7 +448,7 @@ static void nand_class_init(ObjectClass *klass, void *data)
dc->realize = nand_realize;
dc->reset = nand_reset;
dc->vmsd = &vmstate_nand;
dc->props = nand_properties;
device_class_set_props(dc, nand_properties);
}
static const TypeInfo nand_info = {

2
hw/block/nvme.c
View File

@ -1475,7 +1475,7 @@ static void nvme_class_init(ObjectClass *oc, void *data)
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
dc->desc = "Non-Volatile Memory Express";
dc->props = nvme_props;
device_class_set_props(dc, nvme_props);
dc->vmsd = &nvme_vmstate;
}

2
hw/block/onenand.c
View File

@ -845,7 +845,7 @@ static void onenand_class_init(ObjectClass *klass, void *data)
dc->realize = onenand_realize;
dc->reset = onenand_system_reset;
dc->props = onenand_properties;
device_class_set_props(dc, onenand_properties);
}
static const TypeInfo onenand_info = {

2
hw/block/pflash_cfi01.c
View File

@ -930,7 +930,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
dc->reset = pflash_cfi01_system_reset;
dc->realize = pflash_cfi01_realize;
dc->props = pflash_cfi01_properties;
device_class_set_props(dc, pflash_cfi01_properties);
dc->vmsd = &vmstate_pflash;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}

2
hw/block/pflash_cfi02.c
View File

@ -963,7 +963,7 @@ static void pflash_cfi02_class_init(ObjectClass *klass, void *data)
dc->realize = pflash_cfi02_realize;
dc->unrealize = pflash_cfi02_unrealize;
dc->props = pflash_cfi02_properties;
device_class_set_props(dc, pflash_cfi02_properties);
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
}

2
hw/block/swim.c
View File

@ -239,7 +239,7 @@ static void swim_drive_class_init(ObjectClass *klass, void *data)
k->realize = swim_drive_realize;
set_bit(DEVICE_CATEGORY_STORAGE, k->categories);
k->bus_type = TYPE_SWIM_BUS;
k->props = swim_drive_properties;
device_class_set_props(k, swim_drive_properties);
k->desc = "virtual SWIM drive";
}

2
hw/block/vhost-user-blk.c
View File

@ -511,7 +511,7 @@ static void vhost_user_blk_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
dc->props = vhost_user_blk_properties;
device_class_set_props(dc, vhost_user_blk_properties);
dc->vmsd = &vmstate_vhost_user_blk;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
vdc->realize = vhost_user_blk_device_realize;

2
hw/block/virtio-blk.c
View File

@ -1294,7 +1294,7 @@ static void virtio_blk_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
dc->props = virtio_blk_properties;
device_class_set_props(dc, virtio_blk_properties);
dc->vmsd = &vmstate_virtio_blk;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
vdc->realize = virtio_blk_device_realize;

2
hw/block/xen-block.c
View File

@ -554,7 +554,7 @@ static void xen_block_class_init(ObjectClass *class, void *data)
xendev_class->frontend_changed = xen_block_frontend_changed;
xendev_class->unrealize = xen_block_unrealize;
dev_class->props = xen_block_props;
device_class_set_props(dev_class, xen_block_props);
}
static const TypeInfo xen_block_type_info = {

2
hw/char/bcm2835_aux.c
View File

@ -299,7 +299,7 @@ static void bcm2835_aux_class_init(ObjectClass *oc, void *data)
dc->realize = bcm2835_aux_realize;
dc->vmsd = &vmstate_bcm2835_aux;
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->props = bcm2835_aux_props;
device_class_set_props(dc, bcm2835_aux_props);
}
static const TypeInfo bcm2835_aux_info = {

2
hw/char/cadence_uart.c
View File

@ -550,7 +550,7 @@ static void cadence_uart_class_init(ObjectClass *klass, void *data)
dc->realize = cadence_uart_realize;
dc->vmsd = &vmstate_cadence_uart;
dc->reset = cadence_uart_reset;
dc->props = cadence_uart_properties;
device_class_set_props(dc, cadence_uart_properties);
}
static const TypeInfo cadence_uart_info = {

2
hw/char/cmsdk-apb-uart.c
View File

@ -389,7 +389,7 @@ static void cmsdk_apb_uart_class_init(ObjectClass *klass, void *data)
dc->realize = cmsdk_apb_uart_realize;
dc->vmsd = &cmsdk_apb_uart_vmstate;
dc->reset = cmsdk_apb_uart_reset;
dc->props = cmsdk_apb_uart_properties;
device_class_set_props(dc, cmsdk_apb_uart_properties);
}
static const TypeInfo cmsdk_apb_uart_info = {

2
hw/char/debugcon.c
View File

@ -125,7 +125,7 @@ static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = debugcon_isa_realizefn;
dc->props = debugcon_isa_properties;
device_class_set_props(dc, debugcon_isa_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}

2
hw/char/digic-uart.c
View File

@ -183,7 +183,7 @@ static void digic_uart_class_init(ObjectClass *klass, void *data)
dc->realize = digic_uart_realize;
dc->reset = digic_uart_reset;
dc->vmsd = &vmstate_digic_uart;
dc->props = digic_uart_properties;
device_class_set_props(dc, digic_uart_properties);
}
static const TypeInfo digic_uart_info = {

2
hw/char/escc.c
View File

@ -865,7 +865,7 @@ static void escc_class_init(ObjectClass *klass, void *data)
dc->reset = escc_reset;
dc->realize = escc_realize;
dc->vmsd = &vmstate_escc;
dc->props = escc_properties;
device_class_set_props(dc, escc_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

2
hw/char/etraxfs_ser.c
View File

@ -244,7 +244,7 @@ static void etraxfs_ser_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->reset = etraxfs_ser_reset;
dc->props = etraxfs_ser_properties;
device_class_set_props(dc, etraxfs_ser_properties);
dc->realize = etraxfs_ser_realize;
}

2
hw/char/exynos4210_uart.c
View File

@ -710,7 +710,7 @@ static void exynos4210_uart_class_init(ObjectClass *klass, void *data)
dc->realize = exynos4210_uart_realize;
dc->reset = exynos4210_uart_reset;
dc->props = exynos4210_uart_properties;
device_class_set_props(dc, exynos4210_uart_properties);
dc->vmsd = &vmstate_exynos4210_uart;
}

2
hw/char/grlib_apbuart.c
View File

@ -285,7 +285,7 @@ static void grlib_apbuart_class_init(ObjectClass *klass, void *data)
dc->realize = grlib_apbuart_realize;
dc->reset = grlib_apbuart_reset;
dc->props = grlib_apbuart_properties;
device_class_set_props(dc, grlib_apbuart_properties);
}
static const TypeInfo grlib_apbuart_info = {

2
hw/char/imx_serial.c
View File

@ -372,7 +372,7 @@ static void imx_serial_class_init(ObjectClass *klass, void *data)
dc->reset = imx_serial_reset_at_boot;
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->desc = "i.MX series UART";
dc->props = imx_serial_properties;
device_class_set_props(dc, imx_serial_properties);
}
static const TypeInfo imx_serial_info = {

2
hw/char/ipoctal232.c
View File

@ -588,7 +588,7 @@ static void ipoctal_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->desc = "GE IP-Octal 232 8-channel RS-232 IndustryPack";
dc->props = ipoctal_properties;
device_class_set_props(dc, ipoctal_properties);
dc->vmsd = &vmstate_ipoctal;
}

2
hw/char/lm32_juart.c
View File

@ -146,7 +146,7 @@ static void lm32_juart_class_init(ObjectClass *klass, void *data)
dc->reset = juart_reset;
dc->vmsd = &vmstate_lm32_juart;
dc->props = lm32_juart_properties;
device_class_set_props(dc, lm32_juart_properties);
dc->realize = lm32_juart_realize;
}

2
hw/char/lm32_uart.c
View File

@ -293,7 +293,7 @@ static void lm32_uart_class_init(ObjectClass *klass, void *data)
dc->reset = uart_reset;
dc->vmsd = &vmstate_lm32_uart;
dc->props = lm32_uart_properties;
device_class_set_props(dc, lm32_uart_properties);
dc->realize = lm32_uart_realize;
}

2
hw/char/mcf_uart.c
View File

@ -320,7 +320,7 @@ static void mcf_uart_class_init(ObjectClass *oc, void *data)
dc->realize = mcf_uart_realize;
dc->reset = mcf_uart_reset;
dc->props = mcf_uart_properties;
device_class_set_props(dc, mcf_uart_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

2
hw/char/milkymist-uart.c
View File

@ -239,7 +239,7 @@ static void milkymist_uart_class_init(ObjectClass *klass, void *data)
dc->realize = milkymist_uart_realize;
dc->reset = milkymist_uart_reset;
dc->vmsd = &vmstate_milkymist_uart;
dc->props = milkymist_uart_properties;
device_class_set_props(dc, milkymist_uart_properties);
}
static const TypeInfo milkymist_uart_info = {

2
hw/char/nrf51_uart.c
View File

@ -314,7 +314,7 @@ static void nrf51_uart_class_init(ObjectClass *klass, void *data)
dc->reset = nrf51_uart_reset;
dc->realize = nrf51_uart_realize;
dc->props = nrf51_uart_properties;
device_class_set_props(dc, nrf51_uart_properties);
dc->vmsd = &nrf51_uart_vmstate;
}

2
hw/char/parallel.c
View File

@ -627,7 +627,7 @@ static void parallel_isa_class_initfn(ObjectClass *klass, void *data)
dc->realize = parallel_isa_realizefn;
dc->vmsd = &vmstate_parallel_isa;
dc->props = parallel_isa_properties;
device_class_set_props(dc, parallel_isa_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

2
hw/char/pl011.c
View File

@ -356,7 +356,7 @@ static void pl011_class_init(ObjectClass *oc, void *data)
dc->realize = pl011_realize;
dc->vmsd = &vmstate_pl011;
dc->props = pl011_properties;
device_class_set_props(dc, pl011_properties);
}
static const TypeInfo pl011_arm_info = {

2
hw/char/sclpconsole-lm.c
View File

@ -342,7 +342,7 @@ static void console_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
SCLPEventClass *ec = SCLP_EVENT_CLASS(klass);
dc->props = console_properties;
device_class_set_props(dc, console_properties);
dc->reset = console_reset;
dc->vmsd = &vmstate_sclplmconsole;
ec->init = console_init;

2
hw/char/sclpconsole.c
View File

@ -258,7 +258,7 @@ static void console_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
SCLPEventClass *ec = SCLP_EVENT_CLASS(klass);
dc->props = console_properties;
device_class_set_props(dc, console_properties);
dc->reset = console_reset;
dc->vmsd = &vmstate_sclpconsole;
ec->init = console_init;

2
hw/char/serial-isa.c
View File

@ -106,7 +106,7 @@ static void serial_isa_class_initfn(ObjectClass *klass, void *data)
dc->realize = serial_isa_realizefn;
dc->vmsd = &vmstate_isa_serial;
dc->props = serial_isa_properties;
device_class_set_props(dc, serial_isa_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

4
hw/char/serial-pci-multi.c
View File

@ -161,7 +161,7 @@ static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data)
pc->revision = 1;
pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
dc->vmsd = &vmstate_pci_multi_serial;
dc->props = multi_2x_serial_pci_properties;
device_class_set_props(dc, multi_2x_serial_pci_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}
@ -176,7 +176,7 @@ static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data)
pc->revision = 1;
pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
dc->vmsd = &vmstate_pci_multi_serial;
dc->props = multi_4x_serial_pci_properties;
device_class_set_props(dc, multi_4x_serial_pci_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

2
hw/char/serial-pci.c
View File

@ -100,7 +100,7 @@ static void serial_pci_class_initfn(ObjectClass *klass, void *data)
pc->revision = 1;
pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
dc->vmsd = &vmstate_pci_serial;
dc->props = serial_pci_properties;
device_class_set_props(dc, serial_pci_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}

4
hw/char/serial.c
View File

@ -1044,7 +1044,7 @@ static void serial_class_init(ObjectClass *klass, void* data)
dc->realize = serial_realize;
dc->unrealize = serial_unrealize;
dc->vmsd = &vmstate_serial;
dc->props = serial_properties;
device_class_set_props(dc, serial_properties);
}
static const TypeInfo serial_info = {
@ -1159,7 +1159,7 @@ static void serial_mm_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
dc->props = serial_mm_properties;
device_class_set_props(dc, serial_mm_properties);
dc->realize = serial_mm_realize;
}

2
hw/char/spapr_vty.c
View File

@ -193,7 +193,7 @@ static void spapr_vty_class_init(ObjectClass *klass, void *data)
k->dt_type = "serial";
k->dt_compatible = "hvterm1";
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
dc->props = spapr_vty_properties;
device_class_set_props(dc, spapr_vty_properties);
dc->vmsd = &vmstate_spapr_vty;
}

2
hw/char/stm32f2xx_usart.c
View File

@ -222,7 +222,7 @@ static void stm32f2xx_usart_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->reset = stm32f2xx_usart_reset;
dc->props = stm32f2xx_usart_properties;
device_class_set_props(dc, stm32f2xx_usart_properties);
dc->realize = stm32f2xx_usart_realize;
}

2
hw/char/terminal3270.c
View File

@ -288,7 +288,7 @@ static void terminal_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
EmulatedCcw3270Class *ck = EMULATED_CCW_3270_CLASS(klass);
dc->props = terminal_properties;
device_class_set_props(dc, terminal_properties);
dc->vmsd = &terminal3270_vmstate;
ck->init = terminal_init;
ck->read_payload_3270 = read_payload_3270;

2
hw/char/virtio-console.c
View File

@ -287,7 +287,7 @@ static void virtserialport_class_init(ObjectClass *klass, void *data)
k->set_guest_connected = set_guest_connected;
k->enable_backend = virtconsole_enable_backend;
k->guest_writable = guest_writable;
dc->props = virtserialport_properties;
device_class_set_props(dc, virtserialport_properties);
}
static const TypeInfo virtserialport_info = {

4
hw/char/virtio-serial-bus.c
View File

@ -1110,7 +1110,7 @@ static void virtio_serial_port_class_init(ObjectClass *klass, void *data)
k->bus_type = TYPE_VIRTIO_SERIAL_BUS;
k->realize = virtser_port_device_realize;
k->unrealize = virtser_port_device_unrealize;
k->props = virtser_props;
device_class_set_props(k, virtser_props);
}
static const TypeInfo virtio_serial_port_type_info = {
@ -1179,7 +1179,7 @@ static void virtio_serial_class_init(ObjectClass *klass, void *data)
QLIST_INIT(&vserdevices.devices);
dc->props = virtio_serial_properties;
device_class_set_props(dc, virtio_serial_properties);
dc->vmsd = &vmstate_virtio_console;
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
vdc->realize = virtio_serial_device_realize;

2
hw/char/xilinx_uartlite.c
View File

@ -236,7 +236,7 @@ static void xilinx_uartlite_class_init(ObjectClass *klass, void *data)
dc->reset = xilinx_uartlite_reset;
dc->realize = xilinx_uartlite_realize;
dc->props = xilinx_uartlite_properties;
device_class_set_props(dc, xilinx_uartlite_properties);
}
static const TypeInfo xilinx_uartlite_info = {

31
hw/core/Makefile.objs
View File

@ -1,31 +1,32 @@
# core qdev-related obj files, also used by *-user:
common-obj-y += qdev.o qdev-properties.o
common-obj-y += bus.o reset.o
common-obj-$(CONFIG_SOFTMMU) += qdev-fw.o
common-obj-$(CONFIG_SOFTMMU) += fw-path-provider.o
common-obj-y += bus.o
common-obj-y += cpu.o
common-obj-y += hotplug.o
common-obj-y += vmstate-if.o
# irq.o needed for qdev GPIO handling:
common-obj-y += irq.o
common-obj-y += hotplug.o
common-obj-$(CONFIG_SOFTMMU) += reset.o
common-obj-$(CONFIG_SOFTMMU) += qdev-fw.o
common-obj-$(CONFIG_SOFTMMU) += fw-path-provider.o
common-obj-$(CONFIG_SOFTMMU) += nmi.o
common-obj-$(CONFIG_SOFTMMU) += vm-change-state-handler.o
common-obj-y += cpu.o
common-obj-y += vmstate-if.o
common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o
common-obj-$(CONFIG_SOFTMMU) += sysbus.o
common-obj-$(CONFIG_SOFTMMU) += machine.o
common-obj-$(CONFIG_SOFTMMU) += null-machine.o
common-obj-$(CONFIG_SOFTMMU) += loader.o
common-obj-$(CONFIG_SOFTMMU) += machine-hmp-cmds.o
obj-$(CONFIG_SOFTMMU) += machine-qmp-cmds.o
obj-$(CONFIG_SOFTMMU) += numa.o
common-obj-$(CONFIG_EMPTY_SLOT) += empty_slot.o
common-obj-$(CONFIG_XILINX_AXI) += stream.o
common-obj-$(CONFIG_PTIMER) += ptimer.o
common-obj-$(CONFIG_SOFTMMU) += sysbus.o
common-obj-$(CONFIG_SOFTMMU) += machine.o
common-obj-$(CONFIG_SOFTMMU) += loader.o
common-obj-$(CONFIG_FITLOADER) += loader-fit.o
common-obj-$(CONFIG_SOFTMMU) += qdev-properties-system.o
common-obj-$(CONFIG_REGISTER) += register.o
common-obj-$(CONFIG_OR_IRQ) += or-irq.o
common-obj-$(CONFIG_SPLIT_IRQ) += split-irq.o
common-obj-$(CONFIG_PLATFORM_BUS) += platform-bus.o
common-obj-$(CONFIG_GENERIC_LOADER) += generic-loader.o
common-obj-$(CONFIG_SOFTMMU) += null-machine.o
obj-$(CONFIG_SOFTMMU) += machine-qmp-cmds.o
obj-$(CONFIG_SOFTMMU) += numa.o
common-obj-$(CONFIG_SOFTMMU) += machine-hmp-cmds.o

10
hw/core/cpu.c
View File

@ -239,6 +239,14 @@ void cpu_dump_statistics(CPUState *cpu, int flags)
}
}
void cpu_class_set_parent_reset(CPUClass *cc,
void (*child_reset)(CPUState *cpu),
void (**parent_reset)(CPUState *cpu))
{
*parent_reset = cc->reset;
cc->reset = child_reset;
}
void cpu_reset(CPUState *cpu)
{
CPUClass *klass = CPU_GET_CLASS(cpu);
@ -432,7 +440,7 @@ static void cpu_class_init(ObjectClass *klass, void *data)
set_bit(DEVICE_CATEGORY_CPU, dc->categories);
dc->realize = cpu_common_realizefn;
dc->unrealize = cpu_common_unrealizefn;
dc->props = cpu_common_props;
device_class_set_props(dc, cpu_common_props);
/*
* Reason: CPUs still need special care by board code: wiring up
* IRQs, adding reset handlers, halting non-first CPUs, ...

2
hw/core/generic-loader.c
View File

@ -201,7 +201,7 @@ static void generic_loader_class_init(ObjectClass *klass, void *data)
*/
dc->realize = generic_loader_realize;
dc->unrealize = generic_loader_unrealize;
dc->props = generic_loader_props;
device_class_set_props(dc, generic_loader_props);
dc->desc = "Generic Loader";
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}

2
hw/core/or-irq.c
View File

@ -125,7 +125,7 @@ static void or_irq_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->reset = or_irq_reset;
dc->props = or_irq_properties;
device_class_set_props(dc, or_irq_properties);
dc->realize = or_irq_realize;
dc->vmsd = &vmstate_or_irq;

2
hw/core/platform-bus.c
View File

@ -211,7 +211,7 @@ static void platform_bus_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = platform_bus_realize;
dc->props = platform_bus_properties;
device_class_set_props(dc, platform_bus_properties);
}
static const TypeInfo platform_bus_info = {

40
hw/core/qdev-properties.c
View File

@ -73,12 +73,10 @@ static void set_enum(Object *obj, Visitor *v, const char *name, void *opaque,
visit_type_enum(v, prop->name, ptr, prop->info->enum_table, errp);
}
static void set_default_value_enum(Object *obj, const Property *prop)
static void set_default_value_enum(ObjectProperty *op, const Property *prop)
{
object_property_set_str(obj,
qapi_enum_lookup(prop->info->enum_table,
prop->defval.i),
prop->name, &error_abort);
object_property_set_default_str(op,
qapi_enum_lookup(prop->info->enum_table, prop->defval.i));
}
/* Bit */
@ -132,9 +130,9 @@ static void prop_set_bit(Object *obj, Visitor *v, const char *name,
bit_prop_set(dev, prop, value);
}
static void set_default_value_bool(Object *obj, const Property *prop)
static void set_default_value_bool(ObjectProperty *op, const Property *prop)
{
object_property_set_bool(obj, prop->defval.u, prop->name, &error_abort);
object_property_set_default_bool(op, prop->defval.u);
}
const PropertyInfo qdev_prop_bit = {
@ -265,14 +263,14 @@ static void set_uint8(Object *obj, Visitor *v, const char *name, void *opaque,
visit_type_uint8(v, name, ptr, errp);
}
static void set_default_value_int(Object *obj, const Property *prop)
static void set_default_value_int(ObjectProperty *op, const Property *prop)
{
object_property_set_int(obj, prop->defval.i, prop->name, &error_abort);
object_property_set_default_int(op, prop->defval.i);
}
static void set_default_value_uint(Object *obj, const Property *prop)
static void set_default_value_uint(ObjectProperty *op, const Property *prop)
{
object_property_set_uint(obj, prop->defval.u, prop->name, &error_abort);
object_property_set_default_uint(op, prop->defval.u);
}
const PropertyInfo qdev_prop_uint8 = {
@ -925,9 +923,9 @@ static void set_uuid(Object *obj, Visitor *v, const char *name, void *opaque,
g_free(str);
}
static void set_default_uuid_auto(Object *obj, const Property *prop)
static void set_default_uuid_auto(ObjectProperty *op, const Property *prop)
{
object_property_set_str(obj, UUID_VALUE_AUTO, prop->name, &error_abort);
object_property_set_default_str(op, UUID_VALUE_AUTO);
}
const PropertyInfo qdev_prop_uuid = {
@ -1071,7 +1069,7 @@ static Property *qdev_prop_find(DeviceState *dev, const char *name)
/* device properties */
class = object_get_class(OBJECT(dev));
do {
prop = qdev_prop_walk(DEVICE_CLASS(class)->props, name);
prop = qdev_prop_walk(DEVICE_CLASS(class)->props_, name);
if (prop) {
return prop;
}
@ -1243,15 +1241,13 @@ const PropertyInfo qdev_prop_size = {
/* --- object link property --- */
static void create_link_property(Object *obj, Property *prop, Error **errp)
static void create_link_property(ObjectClass *oc, Property *prop, Error **errp)
{
Object **child = qdev_get_prop_ptr(DEVICE(obj), prop);
object_property_add_link(obj, prop->name, prop->link_type,
child,
qdev_prop_allow_set_link_before_realize,
OBJ_PROP_LINK_STRONG,
errp);
object_class_property_add_link(oc, prop->name, prop->link_type,
prop->offset,
qdev_prop_allow_set_link_before_realize,
OBJ_PROP_LINK_STRONG,
errp);
}
const PropertyInfo qdev_prop_link = {

159
hw/core/qdev.c
View File

@ -678,13 +678,11 @@ static void qdev_get_legacy_property(Object *obj, Visitor *v,
}
/**
* qdev_property_add_legacy:
* qdev_class_add_legacy_property:
* @dev: Device to add the property to.
* @prop: The qdev property definition.
* @errp: location to store error information.
*
* Add a legacy QOM property to @dev for qdev property @prop.
* On error, store error in @errp.
*
* Legacy properties are string versions of QOM properties. The format of
* the string depends on the property type. Legacy properties are only
@ -693,69 +691,68 @@ static void qdev_get_legacy_property(Object *obj, Visitor *v,
* Do not use this in new code! QOM Properties added through this interface
* will be given names in the "legacy" namespace.
*/
static void qdev_property_add_legacy(DeviceState *dev, Property *prop,
Error **errp)
static void qdev_class_add_legacy_property(DeviceClass *dc, Property *prop)
{
gchar *name;
g_autofree char *name = NULL;
/* Register pointer properties as legacy properties */
if (!prop->info->print && prop->info->get) {
return;
}
if (prop->info->create) {
return;
}
name = g_strdup_printf("legacy-%s", prop->name);
object_property_add(OBJECT(dev), name, "str",
prop->info->print ? qdev_get_legacy_property : prop->info->get,
NULL,
NULL,
prop, errp);
g_free(name);
object_class_property_add(OBJECT_CLASS(dc), name, "str",
prop->info->print ? qdev_get_legacy_property : prop->info->get,
NULL, NULL, prop, &error_abort);
}
/**
* qdev_property_add_static:
* @dev: Device to add the property to.
* @prop: The qdev property definition.
* @errp: location to store error information.
*
* Add a static QOM property to @dev for qdev property @prop.
* On error, store error in @errp. Static properties access data in a struct.
* The type of the QOM property is derived from prop->info.
*/
void qdev_property_add_static(DeviceState *dev, Property *prop,
Error **errp)
void qdev_property_add_static(DeviceState *dev, Property *prop)
{
Error *local_err = NULL;
Object *obj = OBJECT(dev);
ObjectProperty *op;
if (prop->info->create) {
prop->info->create(obj, prop, &local_err);
} else {
object_property_add(obj, prop->name, prop->info->name,
prop->info->get, prop->info->set,
prop->info->release,
prop, &local_err);
}
assert(!prop->info->create);
if (local_err) {
error_propagate(errp, local_err);
return;
}
op = object_property_add(obj, prop->name, prop->info->name,
prop->info->get, prop->info->set,
prop->info->release,
prop, &error_abort);
object_property_set_description(obj, prop->name,
prop->info->description,
&error_abort);
if (prop->set_default) {
prop->info->set_default_value(obj, prop);
prop->info->set_default_value(op, prop);
if (op->init) {
op->init(obj, op);
}
}
}
static void qdev_class_add_property(DeviceClass *klass, Property *prop)
{
ObjectClass *oc = OBJECT_CLASS(klass);
if (prop->info->create) {
prop->info->create(oc, prop, &error_abort);
} else {
ObjectProperty *op;
op = object_class_property_add(oc,
prop->name, prop->info->name,
prop->info->get, prop->info->set,
prop->info->release,
prop, &error_abort);
if (prop->set_default) {
prop->info->set_default_value(op, prop);
}
}
object_class_property_set_description(oc, prop->name,
prop->info->description,
&error_abort);
}
/* @qdev_alias_all_properties - Add alias properties to the source object for
* all qdev properties on the target DeviceState.
*/
@ -768,7 +765,7 @@ void qdev_alias_all_properties(DeviceState *target, Object *source)
do {
DeviceClass *dc = DEVICE_CLASS(class);
for (prop = dc->props; prop && prop->name; prop++) {
for (prop = dc->props_; prop && prop->name; prop++) {
object_property_add_alias(source, prop->name,
OBJECT(target), prop->name,
&error_abort);
@ -777,32 +774,6 @@ void qdev_alias_all_properties(DeviceState *target, Object *source)
} while (class != object_class_by_name(TYPE_DEVICE));
}
static int qdev_add_hotpluggable_device(Object *obj, void *opaque)
{
GSList **list = opaque;
DeviceState *dev = (DeviceState *)object_dynamic_cast(OBJECT(obj),
TYPE_DEVICE);
if (dev == NULL) {
return 0;
}
if (dev->realized && object_property_get_bool(obj, "hotpluggable", NULL)) {
*list = g_slist_append(*list, dev);
}
return 0;
}
GSList *qdev_build_hotpluggable_device_list(Object *peripheral)
{
GSList *list = NULL;
object_child_foreach(peripheral, qdev_add_hotpluggable_device, &list);
return list;
}
static bool device_get_realized(Object *obj, Error **errp)
{
DeviceState *dev = DEVICE(obj);
@ -975,8 +946,6 @@ static bool device_get_hotplugged(Object *obj, Error **errp)
static void device_initfn(Object *obj)
{
DeviceState *dev = DEVICE(obj);
ObjectClass *class;
Property *prop;
if (qdev_hotplug) {
dev->hotplugged = 1;
@ -987,26 +956,6 @@ static void device_initfn(Object *obj)
dev->realized = false;
dev->allow_unplug_during_migration = false;
object_property_add_bool(obj, "realized",
device_get_realized, device_set_realized, NULL);
object_property_add_bool(obj, "hotpluggable",
device_get_hotpluggable, NULL, NULL);
object_property_add_bool(obj, "hotplugged",
device_get_hotplugged, NULL,
&error_abort);
class = object_get_class(OBJECT(dev));
do {
for (prop = DEVICE_CLASS(class)->props; prop && prop->name; prop++) {
qdev_property_add_legacy(dev, prop, &error_abort);
qdev_property_add_static(dev, prop, &error_abort);
}
class = object_class_get_parent(class);
} while (class != object_class_by_name(TYPE_DEVICE));
object_property_add_link(OBJECT(dev), "parent_bus", TYPE_BUS,
(Object **)&dev->parent_bus, NULL, 0,
&error_abort);
QLIST_INIT(&dev->gpios);
}
@ -1056,7 +1005,7 @@ static void device_class_base_init(ObjectClass *class, void *data)
/* We explicitly look up properties in the superclasses,
* so do not propagate them to the subclasses.
*/
klass->props = NULL;
klass->props_ = NULL;
}
static void device_unparent(Object *obj)
@ -1102,6 +1051,30 @@ static void device_class_init(ObjectClass *class, void *data)
dc->hotpluggable = true;
dc->user_creatable = true;
vc->get_id = device_vmstate_if_get_id;
object_class_property_add_bool(class, "realized",
device_get_realized, device_set_realized,
&error_abort);
object_class_property_add_bool(class, "hotpluggable",
device_get_hotpluggable, NULL,
&error_abort);
object_class_property_add_bool(class, "hotplugged",
device_get_hotplugged, NULL,
&error_abort);
object_class_property_add_link(class, "parent_bus", TYPE_BUS,
offsetof(DeviceState, parent_bus), NULL, 0,
&error_abort);
}
void device_class_set_props(DeviceClass *dc, Property *props)
{
Property *prop;
dc->props_ = props;
for (prop = props; prop && prop->name; prop++) {
qdev_class_add_legacy_property(dc, prop);
qdev_class_add_property(dc, prop);
}
}
void device_class_set_parent_reset(DeviceClass *dc,

2
hw/core/split-irq.c
View File

@ -69,7 +69,7 @@ static void split_irq_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
/* No state to reset or migrate */
dc->props = split_irq_properties;
device_class_set_props(dc, split_irq_properties);
dc->realize = split_irq_realize;
/* Reason: Needs to be wired up to work */

2
hw/cpu/a15mpcore.c
View File

@ -164,7 +164,7 @@ static void a15mp_priv_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = a15mp_priv_realize;
dc->props = a15mp_priv_properties;
device_class_set_props(dc, a15mp_priv_properties);
/* We currently have no savable state */
}

2
hw/cpu/a9mpcore.c
View File

@ -175,7 +175,7 @@ static void a9mp_priv_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = a9mp_priv_realize;
dc->props = a9mp_priv_properties;
device_class_set_props(dc, a9mp_priv_properties);
}
static const TypeInfo a9mp_priv_info = {

2
hw/cpu/arm11mpcore.c
View File

@ -156,7 +156,7 @@ static void mpcore_priv_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = mpcore_priv_realize;
dc->props = mpcore_priv_properties;
device_class_set_props(dc, mpcore_priv_properties);
}
static const TypeInfo mpcore_priv_info = {

2
hw/cpu/cluster.c
View File

@ -78,7 +78,7 @@ static void cpu_cluster_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = cpu_cluster_properties;
device_class_set_props(dc, cpu_cluster_properties);
dc->realize = cpu_cluster_realize;
/* This is not directly for users, CPU children must be attached by code */

2
hw/cpu/realview_mpcore.c
View File

@ -125,7 +125,7 @@ static void mpcore_rirq_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = realview_mpcore_realize;
dc->props = mpcore_rirq_properties;
device_class_set_props(dc, mpcore_rirq_properties);
}
static const TypeInfo mpcore_rirq_info = {

2
hw/display/ati.c
View File

@ -980,7 +980,7 @@ static void ati_vga_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
dc->reset = ati_vga_reset;
dc->props = ati_vga_properties;
device_class_set_props(dc, ati_vga_properties);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);

2
hw/display/bcm2835_fb.c
View File

@ -451,7 +451,7 @@ static void bcm2835_fb_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->props = bcm2835_fb_props;
device_class_set_props(dc, bcm2835_fb_props);
dc->realize = bcm2835_fb_realize;
dc->reset = bcm2835_fb_reset;
dc->vmsd = &vmstate_bcm2835_fb;

2
hw/display/bochs-display.c
View File

@ -364,7 +364,7 @@ static void bochs_display_class_init(ObjectClass *klass, void *data)
k->romfile = "vgabios-bochs-display.bin";
k->exit = bochs_display_exit;
dc->vmsd = &vmstate_bochs_display;
dc->props = bochs_display_properties;
device_class_set_props(dc, bochs_display_properties);
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
}

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