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target-i386: fix ordering of fields in CPUX86State 

Make sure reset zeroes TSC_AUX, XCR0, PKRU.  Move XSTATE_BV from the
"vmstate only" section to the "KVM only" section.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2016-08-21 23:16:12 +02:00
parent bb93e09988
commit 7616f1c2da
1 changed files with 6 additions and 6 deletions
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12
target-i386/cpu.h
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@ -1035,6 +1035,9 @@ typedef struct CPUX86State {
uint64_t tsc;
uint64_t tsc_adjust;
uint64_t tsc_deadline;
uint64_t tsc_aux;
uint64_t xcr0;
uint64_t mcg_status;
uint64_t msr_ia32_misc_enable;
@ -1051,6 +1054,8 @@ typedef struct CPUX86State {
uint64_t pat;
uint32_t smbase;
uint32_t pkru;
/* End of state preserved by INIT (dummy marker). */
struct {} end_init_save;
@ -1135,20 +1140,15 @@ typedef struct CPUX86State {
uint64_t mcg_ctl;
uint64_t mcg_ext_ctl;
uint64_t mce_banks[MCE_BANKS_DEF*4];
uint64_t tsc_aux;
uint64_t xstate_bv;
/* vmstate */
uint16_t fpus_vmstate;
uint16_t fptag_vmstate;
uint16_t fpregs_format_vmstate;
uint64_t xstate_bv;
uint64_t xcr0;
uint64_t xss;
uint32_t pkru;
TPRAccess tpr_access_type;
} CPUX86State;