target-s390: Convert LLGT
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -285,6 +285,9 @@
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D(0xa50d, LLIHL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 32)
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D(0xa50e, LLILH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 16)
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D(0xa50f, LLILL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 0)
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/* LOAD LOGICAL THIRTY ONE BITS */
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C(0xb917, LLGTR, RRE, Z, 0, r2_o, r1, 0, llgt, 0)
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C(0xe317, LLGT, RXY_a, Z, 0, m2_32u, r1, 0, llgt, 0)
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/* LOAD NEGATIVE */
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C(0x1100, LNR, RR_a, Z, 0, r2_32s, new, r1_32, nabs, nabs32)
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C(0xb901, LNGR, RRE, Z, 0, r2, r1, 0, nabs, nabs64)
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@ -1001,30 +1001,6 @@ static void free_compare(DisasCompare *c)
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}
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}
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static void disas_e3(CPUS390XState *env, DisasContext* s, int op, int r1,
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int x2, int b2, int d2)
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{
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TCGv_i64 addr, tmp2;
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LOG_DISAS("disas_e3: op 0x%x r1 %d x2 %d b2 %d d2 %d\n",
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op, r1, x2, b2, d2);
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addr = get_address(s, x2, b2, d2);
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switch (op) {
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case 0x17: /* LLGT R1,D2(X2,B2) [RXY] */
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tmp2 = tcg_temp_new_i64();
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tcg_gen_qemu_ld32u(tmp2, addr, get_mem_index(s));
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tcg_gen_andi_i64(tmp2, tmp2, 0x7fffffffULL);
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store_reg(r1, tmp2);
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tcg_temp_free_i64(tmp2);
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break;
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default:
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LOG_DISAS("illegal e3 operation 0x%x\n", op);
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gen_illegal_opcode(s);
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break;
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}
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tcg_temp_free_i64(addr);
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}
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static void disas_ed(CPUS390XState *env, DisasContext *s, int op, int r1,
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int x2, int b2, int d2, int r1b)
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{
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@ -1804,15 +1780,6 @@ static void disas_b9(CPUS390XState *env, DisasContext *s, int op, int r1,
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LOG_DISAS("disas_b9: op 0x%x r1 %d r2 %d\n", op, r1, r2);
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switch (op) {
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case 0x17: /* LLGTR R1,R2 [RRE] */
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tmp32_1 = load_reg32(r2);
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tmp = tcg_temp_new_i64();
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tcg_gen_andi_i32(tmp32_1, tmp32_1, 0x7fffffffUL);
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tcg_gen_extu_i32_i64(tmp, tmp32_1);
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store_reg(r1, tmp);
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tcg_temp_free_i32(tmp32_1);
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tcg_temp_free_i64(tmp);
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break;
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case 0x83: /* FLOGR R1,R2 [RRE] */
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tmp = load_reg(r2);
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tmp32_1 = tcg_const_i32(r1);
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@ -1858,17 +1825,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s)
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op = (insn >> 16) & 0xff;
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disas_b9(env, s, op, r1, r2);
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break;
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case 0xe3:
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insn = ld_code6(env, s->pc);
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debug_insn(insn);
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op = insn & 0xff;
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r1 = (insn >> 36) & 0xf;
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x2 = (insn >> 32) & 0xf;
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b2 = (insn >> 28) & 0xf;
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d2 = ((int)((((insn >> 16) & 0xfff)
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| ((insn << 4) & 0xff000)) << 12)) >> 12;
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disas_e3(env, s, op, r1, x2, b2, d2 );
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break;
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case 0xed:
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insn = ld_code6(env, s->pc);
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debug_insn(insn);
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@ -2654,6 +2610,12 @@ static ExitStatus op_insi(DisasContext *s, DisasOps *o)
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return NO_EXIT;
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}
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static ExitStatus op_llgt(DisasContext *s, DisasOps *o)
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{
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tcg_gen_andi_i64(o->out, o->in2, 0x7fffffff);
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return NO_EXIT;
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}
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static ExitStatus op_ld8s(DisasContext *s, DisasOps *o)
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{
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tcg_gen_qemu_ld8s(o->out, o->in2, get_mem_index(s));
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