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tcg/loongarch64: Update tcg-insn-defs.c.inc 

Regenerate with ADDU16I included:

   $ cd loongarch-opcodes/scripts/go
   $ go run ./genqemutcgdefs > $QEMU/tcg/loongarch64/tcg-insn-defs.c.inc

Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2022-11-28 21:57:31 -08:00
parent 3fe7e36b44
commit 76baa33a10
1 changed files with 9 additions and 1 deletions
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10
tcg/loongarch64/tcg-insn-defs.c.inc
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@ -4,7 +4,7 @@
* *
* This file is auto-generated by genqemutcgdefs from * This file is auto-generated by genqemutcgdefs from
* https://github.com/loongson-community/loongarch-opcodes, * https://github.com/loongson-community/loongarch-opcodes,
* from commit 961f0c60f5b63e574d785995600c71ad5413fdc4. * from commit 25ca7effe9d88101c1cf96c4005423643386d81f.
* DO NOT EDIT. * DO NOT EDIT.
*/ */
@ -74,6 +74,7 @@ typedef enum {
OPC_ANDI = 0x03400000, OPC_ANDI = 0x03400000,
OPC_ORI = 0x03800000, OPC_ORI = 0x03800000,
OPC_XORI = 0x03c00000, OPC_XORI = 0x03c00000,
OPC_ADDU16I_D = 0x10000000,
OPC_LU12I_W = 0x14000000, OPC_LU12I_W = 0x14000000,
OPC_CU32I_D = 0x16000000, OPC_CU32I_D = 0x16000000,
OPC_PCADDU2I = 0x18000000, OPC_PCADDU2I = 0x18000000,
@ -710,6 +711,13 @@ tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12)); tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
} }
/* Emits the `addu16i.d d, j, sk16` instruction. */
static void __attribute__((unused))
tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
{
tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
}
/* Emits the `lu12i.w d, sj20` instruction. */ /* Emits the `lu12i.w d, sj20` instruction. */
static void __attribute__((unused)) static void __attribute__((unused))
tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20) tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20)