Partial SD card SPI mode support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3731 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
f3b9f95432
commit
775616c3ae
1
Makefile
1
Makefile
@ -57,6 +57,7 @@ OBJS+=i2c.o smbus.o smbus_eeprom.o max7310.o max111x.o wm8750.o
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OBJS+=ssd0303.o ssd0323.o ads7846.o stellaris_input.o
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OBJS+=scsi-disk.o cdrom.o
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OBJS+=usb.o usb-hub.o usb-linux.o usb-hid.o usb-msd.o usb-wacom.o
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OBJS+=sd.o ssi-sd.o
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ifdef CONFIG_WIN32
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OBJS+=tap-win32.o
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@ -488,7 +488,7 @@ endif
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ifeq ($(TARGET_BASE_ARCH), arm)
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VL_OBJS+= integratorcp.o versatilepb.o ps2.o smc91c111.o arm_pic.o arm_timer.o
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VL_OBJS+= arm_boot.o pl011.o pl031.o pl050.o pl080.o pl110.o pl181.o pl190.o
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VL_OBJS+= versatile_pci.o sd.o ptimer.o
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VL_OBJS+= versatile_pci.o ptimer.o
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VL_OBJS+= realview_gic.o realview.o arm_sysctl.o mpcore.o
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VL_OBJS+= armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o
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VL_OBJS+= pl061.o
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@ -525,7 +525,7 @@ struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base,
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cpu_register_physical_memory(s->base, 0x800, iomemtype);
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/* Instantiate the storage */
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s->card = sd_init(bd);
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s->card = sd_init(bd, 0);
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return s;
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}
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15
hw/pl061.c
15
hw/pl061.c
@ -48,6 +48,7 @@ typedef struct {
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uint8_t slr;
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uint8_t den;
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uint8_t cr;
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uint8_t float_high;
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qemu_irq irq;
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qemu_irq out[8];
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} pl061_state;
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@ -56,18 +57,22 @@ static void pl061_update(pl061_state *s)
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{
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uint8_t changed;
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uint8_t mask;
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uint8_t out;
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int i;
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changed = s->old_data ^ s->data;
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/* Outputs float high. */
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/* FIXME: This is board dependent. */
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out = (s->data & s->dir) | ~s->dir;
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changed = s->old_data ^ out;
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if (!changed)
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return;
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s->old_data = s->data;
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s->old_data = out;
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for (i = 0; i < 8; i++) {
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mask = 1 << i;
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if ((changed & mask & s->dir) && s->out) {
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DPRINTF("Set output %d = %d\n", i, (s->data & mask) != 0);
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qemu_set_irq(s->out[i], (s->data & mask) != 0);
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if ((changed & mask) && s->out) {
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DPRINTF("Set output %d = %d\n", i, (out & mask) != 0);
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qemu_set_irq(s->out[i], (out & mask) != 0);
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}
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}
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@ -458,7 +458,7 @@ void pl181_init(uint32_t base, BlockDriverState *bd,
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pl181_writefn, s);
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cpu_register_physical_memory(base, 0x00001000, iomemtype);
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s->base = base;
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s->card = sd_init(bd);
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s->card = sd_init(bd, 0);
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s->irq[0] = irq0;
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s->irq[1] = irq1;
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qemu_register_reset(pl181_reset, s);
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@ -21,13 +21,15 @@ void pl011_init(uint32_t base, qemu_irq irq, CharDriverState *chr,
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enum pl011_type type);
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/* pl022.c */
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void pl022_init(uint32_t base, qemu_irq irq, int (*xfer_cb)(void *, int),
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typedef int (*ssi_xfer_cb)(void *, int);
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void pl022_init(uint32_t base, qemu_irq irq, ssi_xfer_cb xfer_cb,
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void *opaque);
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/* pl050.c */
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void pl050_init(uint32_t base, qemu_irq irq, int is_mouse);
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/* pl061.c */
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void pl061_float_high(void *opaque, uint8_t mask);
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qemu_irq *pl061_init(uint32_t base, qemu_irq irq, qemu_irq **out);
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/* pl080.c */
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@ -538,7 +538,7 @@ struct pxa2xx_mmci_s *pxa2xx_mmci_init(target_phys_addr_t base,
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cpu_register_physical_memory(base, 0x00100000, iomemtype);
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/* Instantiate the actual storage */
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s->card = sd_init(bd);
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s->card = sd_init(bd, 1);
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register_savevm("pxa2xx_mmci", 0, 0,
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pxa2xx_mmci_save, pxa2xx_mmci_load, s);
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87
hw/sd.c
87
hw/sd.c
@ -87,6 +87,7 @@ struct SDState {
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int pwd_len;
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int function_group[6];
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int spi;
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int current_cmd;
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int blk_written;
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uint32_t data_start;
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@ -395,11 +396,16 @@ static void sd_cardchange(void *opaque)
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}
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}
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SDState *sd_init(BlockDriverState *bs)
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/* We do not model the chip select pin, so allow the board to select
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whether card should be in SSI ot MMC/SD mode. It is also up to the
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board to ensure that ssi transfers only occur when the chip select
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is asserted. */
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SDState *sd_init(BlockDriverState *bs, int is_spi)
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{
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SDState *sd;
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sd = (SDState *) qemu_mallocz(sizeof(SDState));
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sd->spi = is_spi;
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sd_reset(sd, bs);
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bdrv_set_change_cb(sd->bdrv, sd_cardchange, sd);
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return sd;
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@ -567,16 +573,25 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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case 0: /* CMD0: GO_IDLE_STATE */
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switch (sd->state) {
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case sd_inactive_state:
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return sd_r0;
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return sd->spi ? sd_r1 : sd_r0;
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default:
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sd->state = sd_idle_state;
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sd_reset(sd, sd->bdrv);
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return sd_r0;
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return sd->spi ? sd_r1 : sd_r0;
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}
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break;
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case 1: /* CMD1: SEND_OP_CMD */
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if (!sd->spi)
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goto bad_cmd;
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sd->state = sd_transfer_state;
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return sd_r1;
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case 2: /* CMD2: ALL_SEND_CID */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->state) {
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case sd_ready_state:
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sd->state = sd_identification_state;
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@ -588,6 +603,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 3: /* CMD3: SEND_RELATIVE_ADDR */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->state) {
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case sd_identification_state:
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case sd_standby_state:
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@ -601,6 +618,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 4: /* CMD4: SEND_DSR */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->state) {
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case sd_standby_state:
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break;
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@ -611,6 +630,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 6: /* CMD6: SWITCH_FUNCTION */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->mode) {
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case sd_data_transfer_mode:
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sd_function_switch(sd, req.arg);
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@ -625,6 +646,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 7: /* CMD7: SELECT/DESELECT_CARD */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->state) {
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case sd_standby_state:
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if (sd->rca != rca)
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@ -668,6 +691,15 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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return sd_r2_s;
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case sd_transfer_state:
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if (!sd->spi)
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break;
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sd->state = sd_sendingdata_state;
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memcpy(sd->data, sd->csd, 16);
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sd->data_start = req.arg;
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sd->data_offset = 0;
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return sd_r1;
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default:
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break;
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}
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@ -681,12 +713,23 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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return sd_r2_i;
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case sd_transfer_state:
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if (!sd->spi)
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break;
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sd->state = sd_sendingdata_state;
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memcpy(sd->data, sd->cid, 16);
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sd->data_start = req.arg;
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sd->data_offset = 0;
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return sd_r1;
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default:
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break;
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}
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break;
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case 11: /* CMD11: READ_DAT_UNTIL_STOP */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->state) {
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case sd_transfer_state:
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sd->state = sd_sendingdata_state;
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@ -733,6 +776,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 15: /* CMD15: GO_INACTIVE_STATE */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->mode) {
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case sd_data_transfer_mode:
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if (sd->rca != rca)
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@ -796,8 +841,13 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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/* Block write commands (Class 4) */
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case 24: /* CMD24: WRITE_SINGLE_BLOCK */
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if (sd->spi)
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goto unimplemented_cmd;
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switch (sd->state) {
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case sd_transfer_state:
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/* Writing in SPI mode not implemented. */
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if (sd->spi)
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break;
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sd->state = sd_receivingdata_state;
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sd->data_start = req.arg;
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sd->data_offset = 0;
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@ -817,8 +867,13 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 25: /* CMD25: WRITE_MULTIPLE_BLOCK */
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if (sd->spi)
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goto unimplemented_cmd;
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switch (sd->state) {
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case sd_transfer_state:
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/* Writing in SPI mode not implemented. */
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if (sd->spi)
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break;
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sd->state = sd_receivingdata_state;
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sd->data_start = req.arg;
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sd->data_offset = 0;
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@ -838,6 +893,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 26: /* CMD26: PROGRAM_CID */
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if (sd->spi)
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goto bad_cmd;
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switch (sd->state) {
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case sd_transfer_state:
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sd->state = sd_receivingdata_state;
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@ -851,6 +908,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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case 27: /* CMD27: PROGRAM_CSD */
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if (sd->spi)
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goto unimplemented_cmd;
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switch (sd->state) {
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case sd_transfer_state:
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sd->state = sd_receivingdata_state;
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@ -962,6 +1021,8 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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/* Lock card commands (Class 7) */
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case 42: /* CMD42: LOCK_UNLOCK */
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if (sd->spi)
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goto unimplemented_cmd;
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switch (sd->state) {
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case sd_transfer_state:
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sd->state = sd_receivingdata_state;
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@ -1000,10 +1061,17 @@ static sd_rsp_type_t sd_normal_command(SDState *sd,
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break;
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default:
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bad_cmd:
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sd->card_status |= ILLEGAL_COMMAND;
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printf("SD: Unknown CMD%i\n", req.cmd);
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return sd_r0;
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unimplemented_cmd:
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/* Commands that are recognised but not yet implemented in SPI mode. */
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sd->card_status |= ILLEGAL_COMMAND;
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printf ("SD: CMD%i not implemented in SPI mode\n", req.cmd);
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return sd_r0;
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}
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sd->card_status |= ILLEGAL_COMMAND;
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@ -1069,6 +1137,11 @@ static sd_rsp_type_t sd_app_command(SDState *sd,
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break;
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case 41: /* ACMD41: SD_APP_OP_COND */
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if (sd->spi) {
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/* SEND_OP_CMD */
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sd->state = sd_transfer_state;
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return sd_r1;
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}
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switch (sd->state) {
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case sd_idle_state:
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/* We accept any voltage. 10000 V is nothing. */
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@ -1414,6 +1487,14 @@ uint8_t sd_read_data(SDState *sd)
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sd->state = sd_transfer_state;
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break;
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case 9: /* CMD9: SEND_CSD */
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case 10: /* CMD10: SEND_CID */
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ret = sd->data[sd->data_offset ++];
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if (sd->data_offset >= 16)
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sd->state = sd_transfer_state;
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break;
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case 11: /* CMD11: READ_DAT_UNTIL_STOP */
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if (sd->data_offset == 0)
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BLK_READ_BLOCK(sd->data_start, sd->blk_len);
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6
hw/sd.h
6
hw/sd.h
@ -67,7 +67,7 @@ struct sd_request_s {
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typedef struct SDState SDState;
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SDState *sd_init(BlockDriverState *bs);
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SDState *sd_init(BlockDriverState *bs, int is_spi);
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int sd_do_command(SDState *sd, struct sd_request_s *req,
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uint8_t *response);
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void sd_write_data(SDState *sd, uint8_t value);
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@ -75,4 +75,8 @@ uint8_t sd_read_data(SDState *sd);
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void sd_set_cb(SDState *sd, qemu_irq readonly, qemu_irq insert);
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int sd_data_ready(SDState *sd);
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/* ssi-sd.c */
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int ssi_sd_xfer(void *opaque, int val);
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void *ssi_sd_init(BlockDriverState *bs);
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#endif /* __hw_sd_h */
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@ -157,6 +157,9 @@ int ssd0323_xfer_ssi(void *opaque, int data)
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case 0xe3: /* NOP. */
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DATA(0);
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break;
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case 0xff: /* Nasty hack because we don't handle chip selects
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properly. */
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break;
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default:
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BADF("Unknown command: 0x%x\n", data);
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}
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202
hw/ssi-sd.c
Normal file
202
hw/ssi-sd.c
Normal file
@ -0,0 +1,202 @@
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/*
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* SSI to SD card adapter.
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licenced under the GPL.
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*/
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#include "hw.h"
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#include "sd.h"
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//#define DEBUG_SSI_SD 1
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#ifdef DEBUG_SSI_SD
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#define DPRINTF(fmt, args...) \
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do { printf("ssi_sd: " fmt , ##args); } while (0)
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#define BADF(fmt, args...) \
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do { fprintf(stderr, "ssi_sd: error: " fmt , ##args); exit(1);} while (0)
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#else
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#define DPRINTF(fmt, args...) do {} while(0)
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#define BADF(fmt, args...) \
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do { fprintf(stderr, "ssi_sd: error: " fmt , ##args);} while (0)
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#endif
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typedef enum {
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SSI_SD_CMD,
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SSI_SD_CMDARG,
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SSI_SD_RESPONSE,
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SSI_SD_DATA_START,
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SSI_SD_DATA_READ,
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} ssi_sd_mode;
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typedef struct {
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ssi_sd_mode mode;
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int cmd;
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uint8_t cmdarg[4];
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uint8_t response[5];
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int arglen;
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int response_pos;
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int stopping;
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SDState *sd;
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} ssi_sd_state;
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/* State word bits. */
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#define SSI_SDR_LOCKED 0x0001
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#define SSI_SDR_WP_ERASE 0x0002
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#define SSI_SDR_ERROR 0x0004
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#define SSI_SDR_CC_ERROR 0x0008
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#define SSI_SDR_ECC_FAILED 0x0010
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#define SSI_SDR_WP_VIOLATION 0x0020
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#define SSI_SDR_ERASE_PARAM 0x0040
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#define SSI_SDR_OUT_OF_RANGE 0x0080
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#define SSI_SDR_IDLE 0x0100
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#define SSI_SDR_ERASE_RESET 0x0200
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#define SSI_SDR_ILLEGAL_COMMAND 0x0400
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#define SSI_SDR_COM_CRC_ERROR 0x0800
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#define SSI_SDR_ERASE_SEQ_ERROR 0x1000
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#define SSI_SDR_ADDRESS_ERROR 0x2000
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#define SSI_SDR_PARAMETER_ERROR 0x4000
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int ssi_sd_xfer(void *opaque, int val)
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{
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ssi_sd_state *s = (ssi_sd_state *)opaque;
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/* Special case: allow CMD12 (STOP TRANSMISSION) while reading data. */
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if (s->mode == SSI_SD_DATA_READ && val == 0x4d) {
|
||||
s->mode = SSI_SD_CMD;
|
||||
/* There must be at least one byte delay before the card responds. */
|
||||
s->stopping = 1;
|
||||
}
|
||||
|
||||
switch (s->mode) {
|
||||
case SSI_SD_CMD:
|
||||
if (val == 0xff) {
|
||||
DPRINTF("NULL command\n");
|
||||
return 0xff;
|
||||
}
|
||||
s->cmd = val & 0x3f;
|
||||
s->mode = SSI_SD_CMDARG;
|
||||
s->arglen = 0;
|
||||
return 0xff;
|
||||
case SSI_SD_CMDARG:
|
||||
if (s->arglen == 4) {
|
||||
struct sd_request_s request;
|
||||
uint8_t longresp[16];
|
||||
/* FIXME: Check CRC. */
|
||||
request.cmd = s->cmd;
|
||||
request.arg = (s->cmdarg[0] << 24) | (s->cmdarg[1] << 16)
|
||||
| (s->cmdarg[2] << 8) | s->cmdarg[3];
|
||||
DPRINTF("CMD%d arg 0x%08x\n", s->cmd, request.arg);
|
||||
s->arglen = sd_do_command(s->sd, &request, longresp);
|
||||
if (s->arglen <= 0) {
|
||||
s->arglen = 1;
|
||||
s->response[0] = 4;
|
||||
DPRINTF("SD command failed\n");
|
||||
} else if (s->cmd == 58) {
|
||||
/* CMD58 returns R3 response (OCR) */
|
||||
DPRINTF("Returned OCR\n");
|
||||
s->arglen = 5;
|
||||
s->response[0] = 1;
|
||||
memcpy(&s->response[1], longresp, 4);
|
||||
} else if (s->arglen != 4) {
|
||||
BADF("Unexpected response to cmd %d\n", s->cmd);
|
||||
/* Illegal command is about as near as we can get. */
|
||||
s->arglen = 1;
|
||||
s->response[0] = 4;
|
||||
} else {
|
||||
/* All other commands return status. */
|
||||
uint32_t cardstatus;
|
||||
uint16_t status;
|
||||
/* CMD13 returns a 2-byte statuse work. Other commands
|
||||
only return the first byte. */
|
||||
s->arglen = (s->cmd == 13) ? 2 : 1;
|
||||
cardstatus = (longresp[0] << 24) | (longresp[1] << 16)
|
||||
| (longresp[2] << 8) | longresp[3];
|
||||
status = 0;
|
||||
if (((cardstatus >> 9) & 0xf) < 4)
|
||||
status |= SSI_SDR_IDLE;
|
||||
if (cardstatus & ERASE_RESET)
|
||||
status |= SSI_SDR_ERASE_RESET;
|
||||
if (cardstatus & ILLEGAL_COMMAND)
|
||||
status |= SSI_SDR_ILLEGAL_COMMAND;
|
||||
if (cardstatus & COM_CRC_ERROR)
|
||||
status |= SSI_SDR_COM_CRC_ERROR;
|
||||
if (cardstatus & ERASE_SEQ_ERROR)
|
||||
status |= SSI_SDR_ERASE_SEQ_ERROR;
|
||||
if (cardstatus & ADDRESS_ERROR)
|
||||
status |= SSI_SDR_ADDRESS_ERROR;
|
||||
if (cardstatus & CARD_IS_LOCKED)
|
||||
status |= SSI_SDR_LOCKED;
|
||||
if (cardstatus & (LOCK_UNLOCK_FAILED | WP_ERASE_SKIP))
|
||||
status |= SSI_SDR_WP_ERASE;
|
||||
if (cardstatus & SD_ERROR)
|
||||
status |= SSI_SDR_ERROR;
|
||||
if (cardstatus & CC_ERROR)
|
||||
status |= SSI_SDR_CC_ERROR;
|
||||
if (cardstatus & CARD_ECC_FAILED)
|
||||
status |= SSI_SDR_ECC_FAILED;
|
||||
if (cardstatus & WP_VIOLATION)
|
||||
status |= SSI_SDR_WP_VIOLATION;
|
||||
if (cardstatus & ERASE_PARAM)
|
||||
status |= SSI_SDR_ERASE_PARAM;
|
||||
if (cardstatus & (OUT_OF_RANGE | CID_CSD_OVERWRITE))
|
||||
status |= SSI_SDR_OUT_OF_RANGE;
|
||||
/* ??? Don't know what Parameter Error really means, so
|
||||
assume it's set if the second byte is nonzero. */
|
||||
if (status & 0xff)
|
||||
status |= SSI_SDR_PARAMETER_ERROR;
|
||||
s->response[0] = status >> 8;
|
||||
s->response[1] = status;
|
||||
DPRINTF("Card status 0x%02x\n", status);
|
||||
}
|
||||
s->mode = SSI_SD_RESPONSE;
|
||||
s->response_pos = 0;
|
||||
} else {
|
||||
s->cmdarg[s->arglen++] = val;
|
||||
}
|
||||
return 0xff;
|
||||
case SSI_SD_RESPONSE:
|
||||
if (s->stopping) {
|
||||
s->stopping = 0;
|
||||
return 0xff;
|
||||
}
|
||||
if (s->response_pos < s->arglen) {
|
||||
DPRINTF("Response 0x%02x\n", s->response[s->response_pos]);
|
||||
return s->response[s->response_pos++];
|
||||
}
|
||||
if (sd_data_ready(s->sd)) {
|
||||
DPRINTF("Data read\n");
|
||||
s->mode = SSI_SD_DATA_START;
|
||||
} else {
|
||||
DPRINTF("End of command\n");
|
||||
s->mode = SSI_SD_CMD;
|
||||
}
|
||||
return 0xff;
|
||||
case SSI_SD_DATA_START:
|
||||
DPRINTF("Start read block\n");
|
||||
s->mode = SSI_SD_DATA_READ;
|
||||
return 0xfe;
|
||||
case SSI_SD_DATA_READ:
|
||||
val = sd_read_data(s->sd);
|
||||
if (!sd_data_ready(s->sd)) {
|
||||
DPRINTF("Data read end\n");
|
||||
s->mode = SSI_SD_CMD;
|
||||
}
|
||||
return val;
|
||||
}
|
||||
/* Should never happen. */
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
void *ssi_sd_init(BlockDriverState *bs)
|
||||
{
|
||||
ssi_sd_state *s;
|
||||
|
||||
s = (ssi_sd_state *)qemu_mallocz(sizeof(ssi_sd_state));
|
||||
s->mode = SSI_SD_CMD;
|
||||
s->sd = sd_init(bs, 1);
|
||||
return s;
|
||||
}
|
||||
|
@ -14,6 +14,7 @@
|
||||
#include "qemu-timer.h"
|
||||
#include "i2c.h"
|
||||
#include "net.h"
|
||||
#include "sd.h"
|
||||
#include "sysemu.h"
|
||||
#include "boards.h"
|
||||
|
||||
@ -1000,6 +1001,51 @@ static qemu_irq stellaris_adc_init(uint32_t base, qemu_irq irq)
|
||||
return qi[0];
|
||||
}
|
||||
|
||||
/* Some boards have both an OLED controller and SD card connected to
|
||||
the same SSI port, with the SD card chip select connected to a
|
||||
GPIO pin. Technically the OLED chip select is connected to the SSI
|
||||
Fss pin. We do not bother emulating that as both devices should
|
||||
never be selected simultaneously, and our OLED controller ignores stray
|
||||
0xff commands that occur when deselecting the SD card. */
|
||||
|
||||
typedef struct {
|
||||
ssi_xfer_cb xfer_cb[2];
|
||||
void *opaque[2];
|
||||
qemu_irq irq;
|
||||
int current_dev;
|
||||
} stellaris_ssi_bus_state;
|
||||
|
||||
static void stellaris_ssi_bus_select(void *opaque, int irq, int level)
|
||||
{
|
||||
stellaris_ssi_bus_state *s = (stellaris_ssi_bus_state *)opaque;
|
||||
|
||||
s->current_dev = level;
|
||||
}
|
||||
|
||||
static int stellaris_ssi_bus_xfer(void *opaque, int val)
|
||||
{
|
||||
stellaris_ssi_bus_state *s = (stellaris_ssi_bus_state *)opaque;
|
||||
|
||||
return s->xfer_cb[s->current_dev](s->opaque[s->current_dev], val);
|
||||
}
|
||||
|
||||
static void *stellaris_ssi_bus_init(qemu_irq *irqp,
|
||||
ssi_xfer_cb cb0, void *opaque0,
|
||||
ssi_xfer_cb cb1, void *opaque1)
|
||||
{
|
||||
qemu_irq *qi;
|
||||
stellaris_ssi_bus_state *s;
|
||||
|
||||
s = (stellaris_ssi_bus_state *)qemu_mallocz(sizeof(stellaris_ssi_bus_state));
|
||||
s->xfer_cb[0] = cb0;
|
||||
s->opaque[0] = opaque0;
|
||||
s->xfer_cb[1] = cb1;
|
||||
s->opaque[1] = opaque1;
|
||||
qi = qemu_allocate_irqs(stellaris_ssi_bus_select, s, 1);
|
||||
*irqp = *qi;
|
||||
return s;
|
||||
}
|
||||
|
||||
/* Board init. */
|
||||
static stellaris_board_info stellaris_boards[] = {
|
||||
{ "LM3S811EVB",
|
||||
@ -1085,9 +1131,19 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
|
||||
if (board->dc2 & (1 << 4)) {
|
||||
if (board->peripherals & BP_OLED_SSI) {
|
||||
void * oled;
|
||||
/* FIXME: Implement chip select for OLED/MMC. */
|
||||
void * sd;
|
||||
void *ssi_bus;
|
||||
|
||||
oled = ssd0323_init(ds, &gpio_out[GPIO_C][7]);
|
||||
pl022_init(0x40008000, pic[7], ssd0323_xfer_ssi, oled);
|
||||
sd = ssi_sd_init(sd_bdrv);
|
||||
|
||||
ssi_bus = stellaris_ssi_bus_init(&gpio_out[GPIO_D][0],
|
||||
ssi_sd_xfer, sd,
|
||||
ssd0323_xfer_ssi, oled);
|
||||
|
||||
pl022_init(0x40008000, pic[7], stellaris_ssi_bus_xfer, ssi_bus);
|
||||
/* Make sure the select pin is high. */
|
||||
qemu_irq_raise(gpio_out[GPIO_D][0]);
|
||||
} else {
|
||||
pl022_init(0x40008000, pic[7], NULL, NULL);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user