hw/dma/xlnx-zdma Always expect 'dma' link property to be set

Simplify by always passing a MemoryRegion property to the device.
Doing so we can move the AddressSpace field to the device struct,
removing need for heap allocation.

Update the Xilinx ZynqMP / Versal SoC models to pass the default
system memory instead of a NULL value.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210819163422.2863447-5-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2021-08-19 18:34:22 +02:00 committed by Peter Maydell
parent c31b7f5901
commit 783dbab19f
4 changed files with 23 additions and 13 deletions

View File

@ -218,6 +218,8 @@ static void versal_create_admas(Versal *s, qemu_irq *pic)
TYPE_XLNX_ZDMA);
dev = DEVICE(&s->lpd.iou.adma[i]);
object_property_set_int(OBJECT(dev), "bus-width", 128, &error_abort);
object_property_set_link(OBJECT(dev), "dma",
OBJECT(get_system_memory()), &error_fatal);
sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);

View File

@ -601,6 +601,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
errp)) {
return;
}
if (!object_property_set_link(OBJECT(&s->gdma[i]), "dma",
OBJECT(system_memory), errp)) {
return;
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gdma[i]), errp)) {
return;
}
@ -611,6 +615,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
}
for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
if (!object_property_set_link(OBJECT(&s->adma[i]), "dma",
OBJECT(system_memory), errp)) {
return;
}
if (!sysbus_realize(SYS_BUS_DEVICE(&s->adma[i]), errp)) {
return;
}

View File

@ -320,9 +320,9 @@ static bool zdma_load_descriptor(XlnxZDMA *s, uint64_t addr,
return false;
}
descr->addr = address_space_ldq_le(s->dma_as, addr, s->attr, NULL);
descr->size = address_space_ldl_le(s->dma_as, addr + 8, s->attr, NULL);
descr->attr = address_space_ldl_le(s->dma_as, addr + 12, s->attr, NULL);
descr->addr = address_space_ldq_le(&s->dma_as, addr, s->attr, NULL);
descr->size = address_space_ldl_le(&s->dma_as, addr + 8, s->attr, NULL);
descr->attr = address_space_ldl_le(&s->dma_as, addr + 12, s->attr, NULL);
return true;
}
@ -354,7 +354,7 @@ static void zdma_update_descr_addr(XlnxZDMA *s, bool type,
} else {
addr = zdma_get_regaddr64(s, basereg);
addr += sizeof(s->dsc_dst);
next = address_space_ldq_le(s->dma_as, addr, s->attr, NULL);
next = address_space_ldq_le(&s->dma_as, addr, s->attr, NULL);
}
zdma_put_regaddr64(s, basereg, next);
@ -421,7 +421,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len)
}
}
address_space_write(s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
address_space_write(&s->dma_as, s->dsc_dst.addr, s->attr, buf, dlen);
if (burst_type == AXI_BURST_INCR) {
s->dsc_dst.addr += dlen;
}
@ -497,7 +497,7 @@ static void zdma_process_descr(XlnxZDMA *s)
len = s->cfg.bus_width / 8;
}
} else {
address_space_read(s->dma_as, src_addr, s->attr, s->buf, len);
address_space_read(&s->dma_as, src_addr, s->attr, s->buf, len);
if (burst_type == AXI_BURST_INCR) {
src_addr += len;
}
@ -765,6 +765,12 @@ static void zdma_realize(DeviceState *dev, Error **errp)
XlnxZDMA *s = XLNX_ZDMA(dev);
unsigned int i;
if (!s->dma_mr) {
error_setg(errp, TYPE_XLNX_ZDMA " 'dma' link not set");
return;
}
address_space_init(&s->dma_as, s->dma_mr, "zdma-dma");
for (i = 0; i < ARRAY_SIZE(zdma_regs_info); ++i) {
RegisterInfo *r = &s->regs_info[zdma_regs_info[i].addr / 4];
@ -777,12 +783,6 @@ static void zdma_realize(DeviceState *dev, Error **errp)
};
}
if (s->dma_mr) {
s->dma_as = g_malloc0(sizeof(AddressSpace));
address_space_init(s->dma_as, s->dma_mr, NULL);
} else {
s->dma_as = &address_space_memory;
}
s->attr = MEMTXATTRS_UNSPECIFIED;
}

View File

@ -56,7 +56,7 @@ struct XlnxZDMA {
MemoryRegion iomem;
MemTxAttrs attr;
MemoryRegion *dma_mr;
AddressSpace *dma_as;
AddressSpace dma_as;
qemu_irq irq_zdma_ch_imr;
struct {