tcg: Correct invalid mentions of 'softmmu' by 'system-mode'

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231004090629.37473-6-philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2023-10-04 11:06:20 +02:00 committed by Paolo Bonzini
parent c2646d4958
commit 7893e42d5d
26 changed files with 43 additions and 42 deletions

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@ -940,7 +940,7 @@ void *page_get_target_data(target_ulong address)
void page_reset_target_data(target_ulong start, target_ulong last) { }
#endif /* TARGET_PAGE_DATA_SIZE */
/* The softmmu versions of these helpers are in cputlb.c. */
/* The system-mode versions of these helpers are in cputlb.c. */
static void *cpu_mmu_lookup(CPUState *cpu, vaddr addr,
MemOp mop, uintptr_t ra, MMUAccessType type)

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@ -1458,7 +1458,7 @@ TCG test dependencies
~~~~~~~~~~~~~~~~~~~~~
The TCG tests are deliberately very light on dependencies and are
either totally bare with minimal gcc lib support (for softmmu tests)
either totally bare with minimal gcc lib support (for system-mode tests)
or just glibc (for linux-user tests). This is because getting a cross
compiler to work with additional libraries can be challenging.

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@ -43,8 +43,8 @@
* See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80878
*
* This interpretation is not especially helpful for QEMU.
* For softmmu, all RAM is always read/write from the hypervisor.
* For user-only, if the guest doesn't implement such an __atomic_read
* For system-mode, all RAM is always read/write from the hypervisor.
* For user-mode, if the guest doesn't implement such an __atomic_read
* then the host need not worry about it either.
*
* Moreover, using libatomic is not an option, because its interface is

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@ -265,7 +265,7 @@ void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx);
*
* See tcg/README for more info about this TCG operation.
*
* NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
* NOTE: In system emulation, direct jumps with goto_tb are only safe within
* the pages this TB resides in because we don't take care of direct jumps when
* address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
* static address translation, so the destination address is always valid, TBs

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@ -100,7 +100,7 @@ static inline target_ulong adjust_addr(CPURISCVState *env, target_ulong addr)
/*
* This function checks watchpoint before real load operation.
*
* In softmmu mode, the TLB API probe_access is enough for watchpoint check.
* In system mode, the TLB API probe_access is enough for watchpoint check.
* In user mode, there is no watchpoint support now.
*
* It will trigger an exception if there is no mapping in TLB

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@ -1643,8 +1643,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
#define MIN_TLB_MASK_TABLE_OFS -512
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -353,7 +353,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
#define ALL_VECTOR_REGS 0xffff0000u
/*
* r0-r3 will be overwritten when reading the tlb entry (softmmu only);
* r0-r3 will be overwritten when reading the tlb entry (system-mode only);
* r14 will be overwritten by the BLNE branching to the slow path.
*/
#ifdef CONFIG_SOFTMMU

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@ -2276,7 +2276,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
int movop = OPC_MOVL_EvGv;
/*
* Do big-endian stores with movbe or softmmu.
* Do big-endian stores with movbe or system-mode.
* User-only without movbe will have its swapping done generically.
*/
if (memop & MO_BSWAP) {

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@ -891,8 +891,8 @@ bool tcg_target_has_memory_bswap(MemOp memop)
#define MIN_TLB_MASK_TABLE_OFS -(1 << 11)
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -34,12 +34,12 @@ tcg_user = declare_dependency(link_with: libtcg_user,
dependencies: tcg_ss.dependencies())
user_ss.add(tcg_user)
libtcg_softmmu = static_library('tcg_softmmu',
libtcg_system = static_library('tcg_system',
tcg_ss.sources() + genh,
name_suffix: 'fa',
c_args: '-DCONFIG_SOFTMMU',
build_by_default: false)
tcg_softmmu = declare_dependency(link_with: libtcg_softmmu,
tcg_system = declare_dependency(link_with: libtcg_system,
dependencies: tcg_ss.dependencies())
system_ss.add(tcg_softmmu)
system_ss.add(tcg_system)

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@ -1258,8 +1258,8 @@ bool tcg_target_has_memory_bswap(MemOp memop)
#define MIN_TLB_MASK_TABLE_OFS -32768
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -2091,8 +2091,8 @@ bool tcg_target_has_memory_bswap(MemOp memop)
#define MIN_TLB_MASK_TABLE_OFS -32768
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -733,7 +733,7 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
* and then assigning regions to TCG threads so that the threads can translate
* code in parallel without synchronization.
*
* In softmmu the number of TCG threads is bounded by max_cpus, so we use at
* In system-mode the number of TCG threads is bounded by max_cpus, so we use at
* least max_cpus regions in MTTCG. In !MTTCG we use a single region.
* Note that the TCG options from the command-line (i.e. -accel accel=tcg,[...])
* must have been parsed before calling this function, since it calls
@ -749,7 +749,7 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp)
*
* However, this user-mode limitation is unlikely to be a significant problem
* in practice. Multi-threaded guests share most if not all of their translated
* code, which makes parallel code generation less appealing than in softmmu.
* code, which makes parallel code generation less appealing than in system-mode
*/
void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus)
{

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@ -1227,8 +1227,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
#define MIN_TLB_MASK_TABLE_OFS -(1 << 11)
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -1750,8 +1750,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
#define MIN_TLB_MASK_TABLE_OFS -(1 << 19)
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -1033,8 +1033,8 @@ bool tcg_target_has_memory_bswap(MemOp memop)
#define MIN_TLB_MASK_TABLE_OFS -(1 << 12)
/*
* For softmmu, perform the TLB load and compare.
* For useronly, perform any required alignment tests.
* For system-mode, perform the TLB load and compare.
* For user-mode, perform any required alignment tests.
* In both cases, return a TCGLabelQemuLdst structure if the slow path
* is required and fill in @h with the host address for the fast path.
*/

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@ -760,12 +760,13 @@ static void alloc_tcg_plugin_context(TCGContext *s)
* In user-mode we just point tcg_ctx to tcg_init_ctx. See the documentation
* of tcg_region_init() for the reasoning behind this.
*
* In softmmu each caller registers its context in tcg_ctxs[]. Note that in
* softmmu tcg_ctxs[] does not track tcg_ctx_init, since the initial context
* In system-mode each caller registers its context in tcg_ctxs[]. Note that in
* system-mode tcg_ctxs[] does not track tcg_ctx_init, since the initial context
* is not used anymore for translation once this function is called.
*
* Not tracking tcg_init_ctx in tcg_ctxs[] in softmmu keeps code that iterates
* over the array (e.g. tcg_code_size() the same for both softmmu and user-mode.
* Not tracking tcg_init_ctx in tcg_ctxs[] in system-mode keeps code that
* iterates over the array (e.g. tcg_code_size() the same for both system/user
* modes.
*/
#ifdef CONFIG_USER_ONLY
void tcg_register_thread(void)
@ -1349,7 +1350,7 @@ static void tcg_context_init(unsigned max_cpus)
* In user-mode we simply share the init context among threads, since we
* use a single region. See the documentation tcg_region_init() for the
* reasoning behind this.
* In softmmu we will have at most max_cpus TCG threads.
* In system-mode we will have at most max_cpus TCG threads.
*/
#ifdef CONFIG_USER_ONLY
tcg_ctxs = &tcg_ctx;

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@ -120,7 +120,7 @@ endif
%: %.S
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
else
# For softmmu targets we include a different Makefile fragment as the
# For system targets we include a different Makefile fragment as the
# build options for bare programs are usually pretty different. They
# are expected to provide their own build recipes.
EXTRA_CFLAGS += -ffreestanding

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@ -1,6 +1,6 @@
from __future__ import print_function
#
# Test some of the softmmu debug features with the multiarch memory
# Test some of the system debug features with the multiarch memory
# test. It is a port of the original vmlinux focused test case but
# using the "memory" test instead.
#

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@ -1,6 +1,6 @@
from __future__ import print_function
#
# Test some of the softmmu debug features with the multiarch memory
# Test some of the system debug features with the multiarch memory
# test. It is a port of the original vmlinux focused test case but
# using the "memory" test instead.
#

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@ -1,14 +1,14 @@
/*
* Memory Test
*
* This is intended to test the softmmu code and ensure we properly
* This is intended to test the system-mode code and ensure we properly
* behave across normal and unaligned accesses across several pages.
* We are not replicating memory tests for stuck bits and other
* hardware level failures but looking for issues with different size
* accesses when access is:
*
* - unaligned at various sizes (if -DCHECK_UNALIGNED set)
* - spanning a (softmmu) page
* - spanning a (system) page
* - sign extension when loading
*/

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@ -1,5 +1,5 @@
/*
* Common softmmu code for specification exception testing.
* Common system code for specification exception testing.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/

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@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# List of specification exception tests.
# Shared between the softmmu and the user makefiles.
# Shared between the system and the user makefiles.
PGM_SPECIFICATION_TESTS = \
br-odd \
cgrl-unaligned \

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@ -1,5 +1,5 @@
/*
* Linker script for the softmmu test kernels.
* Linker script for the system test kernels.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/

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@ -1,5 +1,5 @@
#
# Xtensa softmmu tests
# Xtensa system tests
#
CORE=dc232b

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@ -1,5 +1,5 @@
#
# Xtensa softmmu tests
# Xtensa system tests
#
include $(SRC_PATH)/tests/tcg/xtensa/Makefile.softmmu-target