Hexagon (target/hexagon) generator phase 2 - generate header files
Python scripts generate the following files
helper_protos_generated.h.inc
For each instruction we create DEF_HELPER function prototype
helper_funcs_generated.c.inc
For each instruction we create the helper function definition
tcg_funcs_generated.c.inc
For each instruction we create TCG code to generate call to helper
tcg_func_table_generated.c.inc
Table of function pointers indexed by opcode
shortcode_generated.h.inc
Generate a table of instruction "shortcode" semantics
opcodes_def_generated.h.inc
Gives a list of all the opcodes
op_attribs_generated.h.inc
Lists all the attributes associated with each instruction
op_regs_generated.h.inc
Lists the register and immediate operands for each instruction
printinsn_generated.h.inc
Data for printing (disassembling) each instruction (format
string + operands)
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1612763186-18161-21-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Taylor Simpson
Richard Henderson
parent
f7a9e80d5b
commit
793958c93a
220
target/hexagon/gen_helper_funcs.py
Executable file
220
target/hexagon/gen_helper_funcs.py
Executable file
@ -0,0 +1,220 @@
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#!/usr/bin/env python3
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##
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## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sys
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import re
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import string
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import hex_common
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##
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## Helpers for gen_helper_function
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##
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def gen_decl_ea(f):
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f.write(" uint32_t EA;\n")
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def gen_helper_return_type(f,regtype,regid,regno):
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if regno > 1 : f.write(", ")
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f.write("int32_t")
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def gen_helper_return_type_pair(f,regtype,regid,regno):
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if regno > 1 : f.write(", ")
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f.write("int64_t")
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def gen_helper_arg(f,regtype,regid,regno):
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if regno > 0 : f.write(", " )
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f.write("int32_t %s%sV" % (regtype,regid))
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def gen_helper_arg_new(f,regtype,regid,regno):
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if regno >= 0 : f.write(", " )
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f.write("int32_t %s%sN" % (regtype,regid))
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def gen_helper_arg_pair(f,regtype,regid,regno):
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if regno >= 0 : f.write(", ")
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f.write("int64_t %s%sV" % (regtype,regid))
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def gen_helper_arg_opn(f,regtype,regid,i,tag):
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if (hex_common.is_pair(regid)):
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gen_helper_arg_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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if hex_common.is_old_val(regtype, regid, tag):
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gen_helper_arg(f,regtype,regid,i)
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elif hex_common.is_new_val(regtype, regid, tag):
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gen_helper_arg_new(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def gen_helper_arg_imm(f,immlett):
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f.write(", int32_t %s" % (hex_common.imm_name(immlett)))
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def gen_helper_dest_decl(f,regtype,regid,regno,subfield=""):
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f.write(" int32_t %s%sV%s = 0;\n" % \
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(regtype,regid,subfield))
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def gen_helper_dest_decl_pair(f,regtype,regid,regno,subfield=""):
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f.write(" int64_t %s%sV%s = 0;\n" % \
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(regtype,regid,subfield))
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def gen_helper_dest_decl_opn(f,regtype,regid,i):
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if (hex_common.is_pair(regid)):
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gen_helper_dest_decl_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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gen_helper_dest_decl(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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def gen_helper_return(f,regtype,regid,regno):
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f.write(" return %s%sV;\n" % (regtype,regid))
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def gen_helper_return_pair(f,regtype,regid,regno):
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f.write(" return %s%sV;\n" % (regtype,regid))
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def gen_helper_return_opn(f, regtype, regid, i):
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if (hex_common.is_pair(regid)):
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gen_helper_return_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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gen_helper_return(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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##
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## Generate the TCG code to call the helper
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## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
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## We produce:
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## int32_t HELPER(A2_add)(CPUHexagonState *env, int32_t RsV, int32_t RtV)
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## {
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## uint32_t slot __attribute__(unused)) = 4;
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## int32_t RdV = 0;
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## { RdV=RsV+RtV;}
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## COUNT_HELPER(A2_add);
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## return RdV;
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## }
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##
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def gen_helper_function(f, tag, tagregs, tagimms):
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regs = tagregs[tag]
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imms = tagimms[tag]
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numresults = 0
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numscalarresults = 0
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numscalarreadwrite = 0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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numresults += 1
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if (hex_common.is_scalar_reg(regtype)):
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numscalarresults += 1
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if (hex_common.is_readwrite(regid)):
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if (hex_common.is_scalar_reg(regtype)):
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numscalarreadwrite += 1
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if (numscalarresults > 1):
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## The helper is bogus when there is more than one result
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f.write("void HELPER(%s)(CPUHexagonState *env) { BOGUS_HELPER(%s); }\n"
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% (tag, tag))
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else:
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## The return type of the function is the type of the destination
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## register
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i=0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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if (hex_common.is_pair(regid)):
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gen_helper_return_type_pair(f,regtype,regid,i)
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elif (hex_common.is_single(regid)):
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gen_helper_return_type(f,regtype,regid,i)
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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i += 1
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if (numscalarresults == 0):
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f.write("void")
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f.write(" HELPER(%s)(CPUHexagonState *env" % tag)
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i = 1
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## Arguments to the helper function are the source regs and immediates
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_read(regid)):
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gen_helper_arg_opn(f,regtype,regid,i,tag)
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i += 1
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for immlett,bits,immshift in imms:
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gen_helper_arg_imm(f,immlett)
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i += 1
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if hex_common.need_slot(tag):
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if i > 0: f.write(", ")
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f.write("uint32_t slot")
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i += 1
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if hex_common.need_part1(tag):
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if i > 0: f.write(", ")
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f.write("uint32_t part1")
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f.write(")\n{\n")
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if (not hex_common.need_slot(tag)):
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f.write(" uint32_t slot __attribute__((unused)) = 4;\n" )
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if hex_common.need_ea(tag): gen_decl_ea(f)
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## Declare the return variable
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i=0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_writeonly(regid)):
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gen_helper_dest_decl_opn(f,regtype,regid,i)
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i += 1
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if 'A_FPOP' in hex_common.attribdict[tag]:
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f.write(' arch_fpop_start(env);\n');
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f.write(" %s\n" % hex_common.semdict[tag])
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if 'A_FPOP' in hex_common.attribdict[tag]:
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f.write(' arch_fpop_end(env);\n');
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## Save/return the return variable
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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gen_helper_return_opn(f, regtype, regid, i)
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f.write("}\n\n")
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## End of the helper definition
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def main():
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hex_common.read_semantics_file(sys.argv[1])
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hex_common.read_attribs_file(sys.argv[2])
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hex_common.read_overrides_file(sys.argv[3])
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hex_common.calculate_attribs()
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tagregs = hex_common.get_tagregs()
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tagimms = hex_common.get_tagimms()
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with open(sys.argv[4], 'w') as f:
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for tag in hex_common.tags:
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## Skip the priv instructions
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if ( "A_PRIV" in hex_common.attribdict[tag] ) :
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continue
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## Skip the guest instructions
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if ( "A_GUEST" in hex_common.attribdict[tag] ) :
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continue
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## Skip the diag instructions
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if ( tag == "Y6_diag" ) :
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continue
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if ( tag == "Y6_diag0" ) :
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continue
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if ( tag == "Y6_diag1" ) :
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continue
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if ( hex_common.skip_qemu_helper(tag) ):
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continue
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gen_helper_function(f, tag, tagregs, tagimms)
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if __name__ == "__main__":
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main()
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150
target/hexagon/gen_helper_protos.py
Executable file
150
target/hexagon/gen_helper_protos.py
Executable file
@ -0,0 +1,150 @@
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#!/usr/bin/env python3
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##
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## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sys
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import re
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import string
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import hex_common
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##
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## Helpers for gen_helper_prototype
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##
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def_helper_types = {
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'N' : 's32',
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'O' : 's32',
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'P' : 's32',
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'M' : 's32',
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'C' : 's32',
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'R' : 's32',
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'V' : 'ptr',
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'Q' : 'ptr'
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}
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def_helper_types_pair = {
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'R' : 's64',
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'C' : 's64',
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'S' : 's64',
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'G' : 's64',
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'V' : 'ptr',
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'Q' : 'ptr'
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}
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def gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i):
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if (hex_common.is_pair(regid)):
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f.write(", %s" % (def_helper_types_pair[regtype]))
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elif (hex_common.is_single(regid)):
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f.write(", %s" % (def_helper_types[regtype]))
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else:
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print("Bad register parse: ",regtype,regid,toss,numregs)
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##
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## Generate the DEF_HELPER prototype for an instruction
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## For A2_add: Rd32=add(Rs32,Rt32)
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## We produce:
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## DEF_HELPER_3(A2_add, s32, env, s32, s32)
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##
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def gen_helper_prototype(f, tag, tagregs, tagimms):
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regs = tagregs[tag]
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imms = tagimms[tag]
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numresults = 0
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numscalarresults = 0
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numscalarreadwrite = 0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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numresults += 1
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if (hex_common.is_scalar_reg(regtype)):
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numscalarresults += 1
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if (hex_common.is_readwrite(regid)):
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if (hex_common.is_scalar_reg(regtype)):
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numscalarreadwrite += 1
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if (numscalarresults > 1):
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## The helper is bogus when there is more than one result
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f.write('DEF_HELPER_1(%s, void, env)\n' % tag)
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else:
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## Figure out how many arguments the helper will take
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if (numscalarresults == 0):
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def_helper_size = len(regs)+len(imms)+numscalarreadwrite+1
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if hex_common.need_part1(tag): def_helper_size += 1
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if hex_common.need_slot(tag): def_helper_size += 1
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f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
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## The return type is void
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f.write(', void' )
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else:
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def_helper_size = len(regs)+len(imms)+numscalarreadwrite
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if hex_common.need_part1(tag): def_helper_size += 1
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if hex_common.need_slot(tag): def_helper_size += 1
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f.write('DEF_HELPER_%s(%s' % (def_helper_size, tag))
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## Generate the qemu DEF_HELPER type for each result
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i=0
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_written(regid)):
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gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i)
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i += 1
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## Put the env between the outputs and inputs
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f.write(', env' )
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i += 1
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## Generate the qemu type for each input operand (regs and immediates)
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for regtype,regid,toss,numregs in regs:
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if (hex_common.is_read(regid)):
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gen_def_helper_opn(f, tag, regtype, regid, toss, numregs, i)
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i += 1
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for immlett,bits,immshift in imms:
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f.write(", s32")
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## Add the arguments for the instruction slot and part1 (if needed)
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if hex_common.need_slot(tag): f.write(', i32' )
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if hex_common.need_part1(tag): f.write(' , i32' )
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f.write(')\n')
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def main():
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hex_common.read_semantics_file(sys.argv[1])
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hex_common.read_attribs_file(sys.argv[2])
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hex_common.read_overrides_file(sys.argv[3])
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hex_common.calculate_attribs()
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tagregs = hex_common.get_tagregs()
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tagimms = hex_common.get_tagimms()
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with open(sys.argv[4], 'w') as f:
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for tag in hex_common.tags:
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## Skip the priv instructions
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if ( "A_PRIV" in hex_common.attribdict[tag] ) :
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continue
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## Skip the guest instructions
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if ( "A_GUEST" in hex_common.attribdict[tag] ) :
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continue
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## Skip the diag instructions
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if ( tag == "Y6_diag" ) :
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continue
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if ( tag == "Y6_diag0" ) :
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continue
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if ( tag == "Y6_diag1" ) :
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continue
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if ( hex_common.skip_qemu_helper(tag) ):
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continue
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gen_helper_prototype(f, tag, tagregs, tagimms)
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if __name__ == "__main__":
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main()
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39
target/hexagon/gen_op_attribs.py
Executable file
39
target/hexagon/gen_op_attribs.py
Executable file
@ -0,0 +1,39 @@
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#!/usr/bin/env python3
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##
|
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## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
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import hex_common
|
||||
|
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def main():
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hex_common.read_semantics_file(sys.argv[1])
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hex_common.read_attribs_file(sys.argv[2])
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hex_common.calculate_attribs()
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##
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## Generate all the attributes associated with each instruction
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##
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with open(sys.argv[3], 'w') as f:
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for tag in hex_common.tags:
|
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f.write('OP_ATTRIB(%s,ATTRIBS(%s))\n' % \
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(tag, ','.join(sorted(hex_common.attribdict[tag]))))
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if __name__ == "__main__":
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main()
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110
target/hexagon/gen_op_regs.py
Executable file
110
target/hexagon/gen_op_regs.py
Executable file
@ -0,0 +1,110 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
import hex_common
|
||||
|
||||
##
|
||||
## Generate the register and immediate operands for each instruction
|
||||
##
|
||||
def calculate_regid_reg(tag):
|
||||
def letter_inc(x): return chr(ord(x)+1)
|
||||
ordered_implregs = [ 'SP','FP','LR' ]
|
||||
srcdst_lett = 'X'
|
||||
src_lett = 'S'
|
||||
dst_lett = 'D'
|
||||
retstr = ""
|
||||
mapdict = {}
|
||||
for reg in ordered_implregs:
|
||||
reg_rd = 0
|
||||
reg_wr = 0
|
||||
if ('A_IMPLICIT_WRITES_'+reg) in hex_common.attribdict[tag]: reg_wr = 1
|
||||
if reg_rd and reg_wr:
|
||||
retstr += srcdst_lett
|
||||
mapdict[srcdst_lett] = reg
|
||||
srcdst_lett = letter_inc(srcdst_lett)
|
||||
elif reg_rd:
|
||||
retstr += src_lett
|
||||
mapdict[src_lett] = reg
|
||||
src_lett = letter_inc(src_lett)
|
||||
elif reg_wr:
|
||||
retstr += dst_lett
|
||||
mapdict[dst_lett] = reg
|
||||
dst_lett = letter_inc(dst_lett)
|
||||
return retstr,mapdict
|
||||
|
||||
def calculate_regid_letters(tag):
|
||||
retstr,mapdict = calculate_regid_reg(tag)
|
||||
return retstr
|
||||
|
||||
def strip_reg_prefix(x):
|
||||
y=x.replace('UREG.','')
|
||||
y=y.replace('MREG.','')
|
||||
return y.replace('GREG.','')
|
||||
|
||||
def main():
|
||||
hex_common.read_semantics_file(sys.argv[1])
|
||||
hex_common.read_attribs_file(sys.argv[2])
|
||||
tagregs = hex_common.get_tagregs()
|
||||
tagimms = hex_common.get_tagimms()
|
||||
|
||||
with open(sys.argv[3], 'w') as f:
|
||||
for tag in hex_common.tags:
|
||||
regs = tagregs[tag]
|
||||
rregs = []
|
||||
wregs = []
|
||||
regids = ""
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
if hex_common.is_read(regid):
|
||||
if regid[0] not in regids: regids += regid[0]
|
||||
rregs.append(regtype+regid+numregs)
|
||||
if hex_common.is_written(regid):
|
||||
wregs.append(regtype+regid+numregs)
|
||||
if regid[0] not in regids: regids += regid[0]
|
||||
for attrib in hex_common.attribdict[tag]:
|
||||
if hex_common.attribinfo[attrib]['rreg']:
|
||||
rregs.append(strip_reg_prefix(attribinfo[attrib]['rreg']))
|
||||
if hex_common.attribinfo[attrib]['wreg']:
|
||||
wregs.append(strip_reg_prefix(attribinfo[attrib]['wreg']))
|
||||
regids += calculate_regid_letters(tag)
|
||||
f.write('REGINFO(%s,"%s",\t/*RD:*/\t"%s",\t/*WR:*/\t"%s")\n' % \
|
||||
(tag,regids,",".join(rregs),",".join(wregs)))
|
||||
|
||||
for tag in hex_common.tags:
|
||||
imms = tagimms[tag]
|
||||
f.write( 'IMMINFO(%s' % tag)
|
||||
if not imms:
|
||||
f.write(''','u',0,0,'U',0,0''')
|
||||
for sign,size,shamt in imms:
|
||||
if sign == 'r': sign = 's'
|
||||
if not shamt:
|
||||
shamt = "0"
|
||||
f.write(''','%s',%s,%s''' % (sign,size,shamt))
|
||||
if len(imms) == 1:
|
||||
if sign.isupper():
|
||||
myu = 'u'
|
||||
else:
|
||||
myu = 'U'
|
||||
f.write(''','%s',0,0''' % myu)
|
||||
f.write(')\n')
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
36
target/hexagon/gen_opcodes_def.py
Executable file
36
target/hexagon/gen_opcodes_def.py
Executable file
@ -0,0 +1,36 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
import hex_common
|
||||
|
||||
def main():
|
||||
hex_common.read_semantics_file(sys.argv[1])
|
||||
|
||||
##
|
||||
## Generate a list of all the opcodes
|
||||
##
|
||||
with open(sys.argv[3], 'w') as f:
|
||||
for tag in hex_common.tags:
|
||||
f.write ( "OPCODE(%s),\n" % (tag) )
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
173
target/hexagon/gen_printinsn.py
Executable file
173
target/hexagon/gen_printinsn.py
Executable file
@ -0,0 +1,173 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
import hex_common
|
||||
|
||||
##
|
||||
## Generate data for printing each instruction (format string + operands)
|
||||
##
|
||||
def regprinter(m):
|
||||
str = m.group(1)
|
||||
str += ":".join(["%d"]*len(m.group(2)))
|
||||
str += m.group(3)
|
||||
if ('S' in m.group(1)) and (len(m.group(2)) == 1):
|
||||
str += "/%s"
|
||||
elif ('C' in m.group(1)) and (len(m.group(2)) == 1):
|
||||
str += "/%s"
|
||||
return str
|
||||
|
||||
def spacify(s):
|
||||
# Regular expression that matches any operator that contains '=' character:
|
||||
opswithequal_re = '[-+^&|!<>=]?='
|
||||
# Regular expression that matches any assignment operator.
|
||||
assignment_re = '[-+^&|]?='
|
||||
|
||||
# Out of the operators that contain the = sign, if the operator is also an
|
||||
# assignment, spaces will be added around it, unless it's enclosed within
|
||||
# parentheses, or spaces are already present.
|
||||
|
||||
equals = re.compile(opswithequal_re)
|
||||
assign = re.compile(assignment_re)
|
||||
|
||||
slen = len(s)
|
||||
paren_count = {}
|
||||
i = 0
|
||||
pc = 0
|
||||
while i < slen:
|
||||
c = s[i]
|
||||
if c == '(':
|
||||
pc += 1
|
||||
elif c == ')':
|
||||
pc -= 1
|
||||
paren_count[i] = pc
|
||||
i += 1
|
||||
|
||||
# Iterate over all operators that contain the equal sign. If any
|
||||
# match is also an assignment operator, add spaces around it if
|
||||
# the parenthesis count is 0.
|
||||
pos = 0
|
||||
out = []
|
||||
for m in equals.finditer(s):
|
||||
ms = m.start()
|
||||
me = m.end()
|
||||
# t is the string that matched opswithequal_re.
|
||||
t = m.string[ms:me]
|
||||
out += s[pos:ms]
|
||||
pos = me
|
||||
if paren_count[ms] == 0:
|
||||
# Check if the entire string t is an assignment.
|
||||
am = assign.match(t)
|
||||
if am and len(am.group(0)) == me-ms:
|
||||
# Don't add spaces if they are already there.
|
||||
if ms > 0 and s[ms-1] != ' ':
|
||||
out.append(' ')
|
||||
out += t
|
||||
if me < slen and s[me] != ' ':
|
||||
out.append(' ')
|
||||
continue
|
||||
# If this is not an assignment, just append it to the output
|
||||
# string.
|
||||
out += t
|
||||
|
||||
# Append the remaining part of the string.
|
||||
out += s[pos:len(s)]
|
||||
return ''.join(out)
|
||||
|
||||
def main():
|
||||
hex_common.read_semantics_file(sys.argv[1])
|
||||
hex_common.read_attribs_file(sys.argv[2])
|
||||
|
||||
immext_casere = re.compile(r'IMMEXT\(([A-Za-z])')
|
||||
|
||||
with open(sys.argv[3], 'w') as f:
|
||||
for tag in hex_common.tags:
|
||||
if not hex_common.behdict[tag]: continue
|
||||
extendable_upper_imm = False
|
||||
extendable_lower_imm = False
|
||||
m = immext_casere.search(hex_common.semdict[tag])
|
||||
if m:
|
||||
if m.group(1).isupper():
|
||||
extendable_upper_imm = True
|
||||
else:
|
||||
extendable_lower_imm = True
|
||||
beh = hex_common.behdict[tag]
|
||||
beh = hex_common.regre.sub(regprinter,beh)
|
||||
beh = hex_common.absimmre.sub(r"#%s0x%x",beh)
|
||||
beh = hex_common.relimmre.sub(r"PC+%s%d",beh)
|
||||
beh = spacify(beh)
|
||||
# Print out a literal "%s" at the end, used to match empty string
|
||||
# so C won't complain at us
|
||||
if ("A_VECX" in hex_common.attribdict[tag]):
|
||||
macname = "DEF_VECX_PRINTINFO"
|
||||
else: macname = "DEF_PRINTINFO"
|
||||
f.write('%s(%s,"%s%%s"' % (macname,tag,beh))
|
||||
regs_or_imms = \
|
||||
hex_common.reg_or_immre.findall(hex_common.behdict[tag])
|
||||
ri = 0
|
||||
seenregs = {}
|
||||
for allregs,a,b,c,d,allimm,immlett,bits,immshift in regs_or_imms:
|
||||
if a:
|
||||
#register
|
||||
if b in seenregs:
|
||||
regno = seenregs[b]
|
||||
else:
|
||||
regno = ri
|
||||
if len(b) == 1:
|
||||
f.write(', insn->regno[%d]' % regno)
|
||||
if 'S' in a:
|
||||
f.write(', sreg2str(insn->regno[%d])' % regno)
|
||||
elif 'C' in a:
|
||||
f.write(', creg2str(insn->regno[%d])' % regno)
|
||||
elif len(b) == 2:
|
||||
f.write(', insn->regno[%d] + 1, insn->regno[%d]' % \
|
||||
(regno,regno))
|
||||
else:
|
||||
print("Put some stuff to handle quads here")
|
||||
if b not in seenregs:
|
||||
seenregs[b] = ri
|
||||
ri += 1
|
||||
else:
|
||||
#immediate
|
||||
if (immlett.isupper()):
|
||||
if extendable_upper_imm:
|
||||
if immlett in 'rR':
|
||||
f.write(',insn->extension_valid?"##":""')
|
||||
else:
|
||||
f.write(',insn->extension_valid?"#":""')
|
||||
else:
|
||||
f.write(',""')
|
||||
ii = 1
|
||||
else:
|
||||
if extendable_lower_imm:
|
||||
if immlett in 'rR':
|
||||
f.write(',insn->extension_valid?"##":""')
|
||||
else:
|
||||
f.write(',insn->extension_valid?"#":""')
|
||||
else:
|
||||
f.write(',""')
|
||||
ii = 0
|
||||
f.write(', insn->immed[%d]' % ii)
|
||||
# append empty string so there is at least one more arg
|
||||
f.write(',"")\n')
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
60
target/hexagon/gen_shortcode.py
Executable file
60
target/hexagon/gen_shortcode.py
Executable file
@ -0,0 +1,60 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
import hex_common
|
||||
|
||||
def gen_shortcode(f, tag):
|
||||
f.write('DEF_SHORTCODE(%s, %s)\n' % (tag, hex_common.semdict[tag]))
|
||||
|
||||
def main():
|
||||
hex_common.read_semantics_file(sys.argv[1])
|
||||
hex_common.read_attribs_file(sys.argv[2])
|
||||
hex_common.calculate_attribs()
|
||||
tagregs = hex_common.get_tagregs()
|
||||
tagimms = hex_common.get_tagimms()
|
||||
|
||||
with open(sys.argv[3], 'w') as f:
|
||||
f.write("#ifndef DEF_SHORTCODE\n")
|
||||
f.write("#define DEF_SHORTCODE(TAG,SHORTCODE) /* Nothing */\n")
|
||||
f.write("#endif\n")
|
||||
|
||||
for tag in hex_common.tags:
|
||||
## Skip the priv instructions
|
||||
if ( "A_PRIV" in hex_common.attribdict[tag] ) :
|
||||
continue
|
||||
## Skip the guest instructions
|
||||
if ( "A_GUEST" in hex_common.attribdict[tag] ) :
|
||||
continue
|
||||
## Skip the diag instructions
|
||||
if ( tag == "Y6_diag" ) :
|
||||
continue
|
||||
if ( tag == "Y6_diag0" ) :
|
||||
continue
|
||||
if ( tag == "Y6_diag1" ) :
|
||||
continue
|
||||
|
||||
gen_shortcode(f, tag)
|
||||
|
||||
f.write("#undef DEF_SHORTCODE\n")
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
58
target/hexagon/gen_tcg_func_table.py
Executable file
58
target/hexagon/gen_tcg_func_table.py
Executable file
@ -0,0 +1,58 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
import hex_common
|
||||
|
||||
def main():
|
||||
hex_common.read_semantics_file(sys.argv[1])
|
||||
hex_common.read_attribs_file(sys.argv[2])
|
||||
hex_common.calculate_attribs()
|
||||
tagregs = hex_common.get_tagregs()
|
||||
tagimms = hex_common.get_tagimms()
|
||||
|
||||
with open(sys.argv[3], 'w') as f:
|
||||
f.write("#ifndef HEXAGON_FUNC_TABLE_H\n")
|
||||
f.write("#define HEXAGON_FUNC_TABLE_H\n\n")
|
||||
|
||||
f.write("const SemanticInsn opcode_genptr[XX_LAST_OPCODE] = {\n")
|
||||
for tag in hex_common.tags:
|
||||
## Skip the priv instructions
|
||||
if ( "A_PRIV" in hex_common.attribdict[tag] ) :
|
||||
continue
|
||||
## Skip the guest instructions
|
||||
if ( "A_GUEST" in hex_common.attribdict[tag] ) :
|
||||
continue
|
||||
## Skip the diag instructions
|
||||
if ( tag == "Y6_diag" ) :
|
||||
continue
|
||||
if ( tag == "Y6_diag0" ) :
|
||||
continue
|
||||
if ( tag == "Y6_diag1" ) :
|
||||
continue
|
||||
|
||||
f.write(" [%s] = generate_%s,\n" % (tag, tag))
|
||||
f.write("};\n\n")
|
||||
|
||||
f.write("#endif /* HEXAGON_FUNC_TABLE_H */\n")
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
485
target/hexagon/gen_tcg_funcs.py
Executable file
485
target/hexagon/gen_tcg_funcs.py
Executable file
@ -0,0 +1,485 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
import hex_common
|
||||
|
||||
##
|
||||
## Helpers for gen_tcg_func
|
||||
##
|
||||
def gen_decl_ea_tcg(f, tag):
|
||||
if ('A_CONDEXEC' in hex_common.attribdict[tag] or
|
||||
'A_LOAD' in hex_common.attribdict[tag]):
|
||||
f.write(" TCGv EA = tcg_temp_local_new();\n")
|
||||
else:
|
||||
f.write(" TCGv EA = tcg_temp_new();\n")
|
||||
|
||||
def gen_free_ea_tcg(f):
|
||||
f.write(" tcg_temp_free(EA);\n")
|
||||
|
||||
def genptr_decl_pair_writeble(f, tag, regtype, regid, regno):
|
||||
regN="%s%sN" % (regtype,regid)
|
||||
f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
|
||||
(regtype, regid))
|
||||
if (regtype == "C"):
|
||||
f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
|
||||
(regN, regno))
|
||||
else:
|
||||
f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
|
||||
if ('A_CONDEXEC' in hex_common.attribdict[tag]):
|
||||
f.write(" if (!is_preloaded(ctx, %s)) {\n" % regN)
|
||||
f.write(" tcg_gen_mov_tl(hex_new_value[%s], hex_gpr[%s]);\n" % \
|
||||
(regN, regN))
|
||||
f.write(" }\n")
|
||||
f.write(" if (!is_preloaded(ctx, %s + 1)) {\n" % regN)
|
||||
f.write(" tcg_gen_mov_tl(hex_new_value[%s + 1], hex_gpr[%s + 1]);\n" % \
|
||||
(regN, regN))
|
||||
f.write(" }\n")
|
||||
|
||||
def genptr_decl_writeble(f, tag, regtype, regid, regno):
|
||||
regN="%s%sN" % (regtype,regid)
|
||||
f.write(" TCGv %s%sV = tcg_temp_local_new();\n" % \
|
||||
(regtype, regid))
|
||||
if (regtype == "C"):
|
||||
f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
|
||||
(regN, regno))
|
||||
else:
|
||||
f.write(" const int %s = insn->regno[%d];\n" % (regN, regno))
|
||||
if ('A_CONDEXEC' in hex_common.attribdict[tag]):
|
||||
f.write(" if (!is_preloaded(ctx, %s)) {\n" % regN)
|
||||
f.write(" tcg_gen_mov_tl(hex_new_value[%s], hex_gpr[%s]);\n" % \
|
||||
(regN, regN))
|
||||
f.write(" }\n")
|
||||
|
||||
def genptr_decl(f, tag, regtype, regid, regno):
|
||||
regN="%s%sN" % (regtype,regid)
|
||||
if (regtype == "R"):
|
||||
if (regid in {"ss", "tt"}):
|
||||
f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
|
||||
(regtype, regid))
|
||||
f.write(" const int %s = insn->regno[%d];\n" % \
|
||||
(regN, regno))
|
||||
elif (regid in {"dd", "ee", "xx", "yy"}):
|
||||
genptr_decl_pair_writeble(f, tag, regtype, regid, regno)
|
||||
elif (regid in {"s", "t", "u", "v"}):
|
||||
f.write(" TCGv %s%sV = hex_gpr[insn->regno[%d]];\n" % \
|
||||
(regtype, regid, regno))
|
||||
elif (regid in {"d", "e", "x", "y"}):
|
||||
genptr_decl_writeble(f, tag, regtype, regid, regno)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid in {"s", "t", "u", "v"}):
|
||||
f.write(" TCGv %s%sV = hex_pred[insn->regno[%d]];\n" % \
|
||||
(regtype, regid, regno))
|
||||
elif (regid in {"d", "e", "x"}):
|
||||
genptr_decl_writeble(f, tag, regtype, regid, regno)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "C"):
|
||||
if (regid == "ss"):
|
||||
f.write(" TCGv_i64 %s%sV = tcg_temp_local_new_i64();\n" % \
|
||||
(regtype, regid))
|
||||
f.write(" const int %s = insn->regno[%d] + HEX_REG_SA0;\n" % \
|
||||
(regN, regno))
|
||||
elif (regid == "dd"):
|
||||
genptr_decl_pair_writeble(f, tag, regtype, regid, regno)
|
||||
elif (regid == "s"):
|
||||
f.write(" TCGv %s%sV = tcg_temp_local_new();\n" % \
|
||||
(regtype, regid))
|
||||
f.write(" const int %s%sN = insn->regno[%d] + HEX_REG_SA0;\n" % \
|
||||
(regtype, regid, regno))
|
||||
elif (regid == "d"):
|
||||
genptr_decl_writeble(f, tag, regtype, regid, regno)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "M"):
|
||||
if (regid == "u"):
|
||||
f.write(" const int %s%sN = insn->regno[%d];\n"% \
|
||||
(regtype, regid, regno))
|
||||
f.write(" TCGv %s%sV = hex_gpr[%s%sN + HEX_REG_M0];\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_decl_new(f,regtype,regid,regno):
|
||||
if (regtype == "N"):
|
||||
if (regid in {"s", "t"}):
|
||||
f.write(" TCGv %s%sN = hex_new_value[insn->regno[%d]];\n" % \
|
||||
(regtype, regid, regno))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid in {"t", "u", "v"}):
|
||||
f.write(" TCGv %s%sN = hex_new_pred_value[insn->regno[%d]];\n" % \
|
||||
(regtype, regid, regno))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i):
|
||||
if (hex_common.is_pair(regid)):
|
||||
genptr_decl(f, tag, regtype, regid, i)
|
||||
elif (hex_common.is_single(regid)):
|
||||
if hex_common.is_old_val(regtype, regid, tag):
|
||||
genptr_decl(f,tag, regtype, regid, i)
|
||||
elif hex_common.is_new_val(regtype, regid, tag):
|
||||
genptr_decl_new(f,regtype,regid,i)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
|
||||
def genptr_decl_imm(f,immlett):
|
||||
if (immlett.isupper()):
|
||||
i = 1
|
||||
else:
|
||||
i = 0
|
||||
f.write(" int %s = insn->immed[%d];\n" % \
|
||||
(hex_common.imm_name(immlett), i))
|
||||
|
||||
def genptr_free(f,regtype,regid,regno):
|
||||
if (regtype == "R"):
|
||||
if (regid in {"dd", "ss", "tt", "xx", "yy"}):
|
||||
f.write(" tcg_temp_free_i64(%s%sV);\n" % (regtype, regid))
|
||||
elif (regid in {"d", "e", "x", "y"}):
|
||||
f.write(" tcg_temp_free(%s%sV);\n" % (regtype, regid))
|
||||
elif (regid not in {"s", "t", "u", "v"}):
|
||||
print("Bad register parse: ",regtype,regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid in {"d", "e", "x"}):
|
||||
f.write(" tcg_temp_free(%s%sV);\n" % (regtype, regid))
|
||||
elif (regid not in {"s", "t", "u", "v"}):
|
||||
print("Bad register parse: ",regtype,regid)
|
||||
elif (regtype == "C"):
|
||||
if (regid in {"dd", "ss"}):
|
||||
f.write(" tcg_temp_free_i64(%s%sV);\n" % (regtype, regid))
|
||||
elif (regid in {"d", "s"}):
|
||||
f.write(" tcg_temp_free(%s%sV);\n" % (regtype, regid))
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid)
|
||||
elif (regtype == "M"):
|
||||
if (regid != "u"):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_free_new(f,regtype,regid,regno):
|
||||
if (regtype == "N"):
|
||||
if (regid not in {"s", "t"}):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid not in {"t", "u", "v"}):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_free_opn(f,regtype,regid,i,tag):
|
||||
if (hex_common.is_pair(regid)):
|
||||
genptr_free(f,regtype,regid,i)
|
||||
elif (hex_common.is_single(regid)):
|
||||
if hex_common.is_old_val(regtype, regid, tag):
|
||||
genptr_free(f,regtype,regid,i)
|
||||
elif hex_common.is_new_val(regtype, regid, tag):
|
||||
genptr_free_new(f,regtype,regid,i)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
|
||||
def genptr_src_read(f,regtype,regid):
|
||||
if (regtype == "R"):
|
||||
if (regid in {"ss", "tt", "xx", "yy"}):
|
||||
f.write(" tcg_gen_concat_i32_i64(%s%sV, hex_gpr[%s%sN],\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
f.write(" hex_gpr[%s%sN + 1]);\n" % \
|
||||
(regtype, regid))
|
||||
elif (regid in {"x", "y"}):
|
||||
f.write(" tcg_gen_mov_tl(%s%sV, hex_gpr[%s%sN]);\n" % \
|
||||
(regtype,regid,regtype,regid))
|
||||
elif (regid not in {"s", "t", "u", "v"}):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid == "x"):
|
||||
f.write(" tcg_gen_mov_tl(%s%sV, hex_pred[%s%sN]);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
elif (regid not in {"s", "t", "u", "v"}):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "C"):
|
||||
if (regid == "ss"):
|
||||
f.write(" gen_read_ctrl_reg_pair(ctx, %s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
elif (regid == "s"):
|
||||
f.write(" gen_read_ctrl_reg(ctx, %s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "M"):
|
||||
if (regid != "u"):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_src_read_new(f,regtype,regid):
|
||||
if (regtype == "N"):
|
||||
if (regid not in {"s", "t"}):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid not in {"t", "u", "v"}):
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_src_read_opn(f,regtype,regid,tag):
|
||||
if (hex_common.is_pair(regid)):
|
||||
genptr_src_read(f,regtype,regid)
|
||||
elif (hex_common.is_single(regid)):
|
||||
if hex_common.is_old_val(regtype, regid, tag):
|
||||
genptr_src_read(f,regtype,regid)
|
||||
elif hex_common.is_new_val(regtype, regid, tag):
|
||||
genptr_src_read_new(f,regtype,regid)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
|
||||
def gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i):
|
||||
if (i > 0): f.write(", ")
|
||||
if (hex_common.is_pair(regid)):
|
||||
f.write("%s%sV" % (regtype,regid))
|
||||
elif (hex_common.is_single(regid)):
|
||||
if hex_common.is_old_val(regtype, regid, tag):
|
||||
f.write("%s%sV" % (regtype,regid))
|
||||
elif hex_common.is_new_val(regtype, regid, tag):
|
||||
f.write("%s%sN" % (regtype,regid))
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
|
||||
def gen_helper_decl_imm(f,immlett):
|
||||
f.write(" TCGv tcgv_%s = tcg_const_tl(%s);\n" % \
|
||||
(hex_common.imm_name(immlett), hex_common.imm_name(immlett)))
|
||||
|
||||
def gen_helper_call_imm(f,immlett):
|
||||
f.write(", tcgv_%s" % hex_common.imm_name(immlett))
|
||||
|
||||
def gen_helper_free_imm(f,immlett):
|
||||
f.write(" tcg_temp_free(tcgv_%s);\n" % hex_common.imm_name(immlett))
|
||||
|
||||
def genptr_dst_write_pair(f, tag, regtype, regid):
|
||||
if ('A_CONDEXEC' in hex_common.attribdict[tag]):
|
||||
f.write(" gen_log_predicated_reg_write_pair(%s%sN, %s%sV, insn->slot);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
else:
|
||||
f.write(" gen_log_reg_write_pair(%s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
f.write(" ctx_log_reg_write_pair(ctx, %s%sN);\n" % \
|
||||
(regtype, regid))
|
||||
|
||||
def genptr_dst_write(f, tag, regtype, regid):
|
||||
if (regtype == "R"):
|
||||
if (regid in {"dd", "xx", "yy"}):
|
||||
genptr_dst_write_pair(f, tag, regtype, regid)
|
||||
elif (regid in {"d", "e", "x", "y"}):
|
||||
if ('A_CONDEXEC' in hex_common.attribdict[tag]):
|
||||
f.write(" gen_log_predicated_reg_write(%s%sN, %s%sV,\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
f.write(" insn->slot);\n")
|
||||
else:
|
||||
f.write(" gen_log_reg_write(%s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
f.write(" ctx_log_reg_write(ctx, %s%sN);\n" % \
|
||||
(regtype, regid))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "P"):
|
||||
if (regid in {"d", "e", "x"}):
|
||||
f.write(" gen_log_pred_write(%s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
f.write(" ctx_log_pred_write(ctx, %s%sN);\n" % \
|
||||
(regtype, regid))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
elif (regtype == "C"):
|
||||
if (regid == "dd"):
|
||||
f.write(" gen_write_ctrl_reg_pair(ctx, %s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
elif (regid == "d"):
|
||||
f.write(" gen_write_ctrl_reg(ctx, %s%sN, %s%sV);\n" % \
|
||||
(regtype, regid, regtype, regid))
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ", regtype, regid)
|
||||
|
||||
def genptr_dst_write_opn(f,regtype, regid, tag):
|
||||
if (hex_common.is_pair(regid)):
|
||||
genptr_dst_write(f, tag, regtype, regid)
|
||||
elif (hex_common.is_single(regid)):
|
||||
genptr_dst_write(f, tag, regtype, regid)
|
||||
else:
|
||||
print("Bad register parse: ",regtype,regid,toss,numregs)
|
||||
|
||||
##
|
||||
## Generate the TCG code to call the helper
|
||||
## For A2_add: Rd32=add(Rs32,Rt32), { RdV=RsV+RtV;}
|
||||
## We produce:
|
||||
## static void generate_A2_add()
|
||||
## CPUHexagonState *env
|
||||
## DisasContext *ctx,
|
||||
## Insn *insn,
|
||||
## Packet *pkt)
|
||||
## {
|
||||
## TCGv RdV = tcg_temp_local_new();
|
||||
## const int RdN = insn->regno[0];
|
||||
## TCGv RsV = hex_gpr[insn->regno[1]];
|
||||
## TCGv RtV = hex_gpr[insn->regno[2]];
|
||||
## <GEN>
|
||||
## gen_log_reg_write(RdN, RdV);
|
||||
## ctx_log_reg_write(ctx, RdN);
|
||||
## tcg_temp_free(RdV);
|
||||
## }
|
||||
##
|
||||
## where <GEN> depends on hex_common.skip_qemu_helper(tag)
|
||||
## if hex_common.skip_qemu_helper(tag) is True
|
||||
## <GEN> is fGEN_TCG_A2_add({ RdV=RsV+RtV;});
|
||||
## if hex_common.skip_qemu_helper(tag) is False
|
||||
## <GEN> is gen_helper_A2_add(RdV, cpu_env, RsV, RtV);
|
||||
##
|
||||
def gen_tcg_func(f, tag, regs, imms):
|
||||
f.write("static void generate_%s(\n" %tag)
|
||||
f.write(" CPUHexagonState *env,\n")
|
||||
f.write(" DisasContext *ctx,\n")
|
||||
f.write(" Insn *insn,\n")
|
||||
f.write(" Packet *pkt)\n")
|
||||
f.write('{\n')
|
||||
if hex_common.need_ea(tag): gen_decl_ea_tcg(f, tag)
|
||||
i=0
|
||||
## Declare all the operands (regs and immediates)
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
genptr_decl_opn(f, tag, regtype, regid, toss, numregs, i)
|
||||
i += 1
|
||||
for immlett,bits,immshift in imms:
|
||||
genptr_decl_imm(f,immlett)
|
||||
|
||||
if 'A_PRIV' in hex_common.attribdict[tag]:
|
||||
f.write(' fCHECKFORPRIV();\n')
|
||||
if 'A_GUEST' in hex_common.attribdict[tag]:
|
||||
f.write(' fCHECKFORGUEST();\n')
|
||||
|
||||
## Read all the inputs
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
if (hex_common.is_read(regid)):
|
||||
genptr_src_read_opn(f,regtype,regid,tag)
|
||||
|
||||
if ( hex_common.skip_qemu_helper(tag) ):
|
||||
f.write(" fGEN_TCG_%s(%s);\n" % (tag, hex_common.semdict[tag]))
|
||||
else:
|
||||
## Generate the call to the helper
|
||||
for immlett,bits,immshift in imms:
|
||||
gen_helper_decl_imm(f,immlett)
|
||||
if hex_common.need_part1(tag):
|
||||
f.write(" TCGv part1 = tcg_const_tl(insn->part1);\n")
|
||||
if hex_common.need_slot(tag):
|
||||
f.write(" TCGv slot = tcg_const_tl(insn->slot);\n")
|
||||
f.write(" gen_helper_%s(" % (tag))
|
||||
i=0
|
||||
## If there is a scalar result, it is the return type
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
if (hex_common.is_written(regid)):
|
||||
gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i)
|
||||
i += 1
|
||||
if (i > 0): f.write(", ")
|
||||
f.write("cpu_env")
|
||||
i=1
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
if (hex_common.is_read(regid)):
|
||||
gen_helper_call_opn(f, tag, regtype, regid, toss, numregs, i)
|
||||
i += 1
|
||||
for immlett,bits,immshift in imms:
|
||||
gen_helper_call_imm(f,immlett)
|
||||
|
||||
if hex_common.need_slot(tag): f.write(", slot")
|
||||
if hex_common.need_part1(tag): f.write(", part1" )
|
||||
f.write(");\n")
|
||||
if hex_common.need_slot(tag):
|
||||
f.write(" tcg_temp_free(slot);\n")
|
||||
if hex_common.need_part1(tag):
|
||||
f.write(" tcg_temp_free(part1);\n")
|
||||
for immlett,bits,immshift in imms:
|
||||
gen_helper_free_imm(f,immlett)
|
||||
|
||||
## Write all the outputs
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
if (hex_common.is_written(regid)):
|
||||
genptr_dst_write_opn(f,regtype, regid, tag)
|
||||
|
||||
## Free all the operands (regs and immediates)
|
||||
if hex_common.need_ea(tag): gen_free_ea_tcg(f)
|
||||
for regtype,regid,toss,numregs in regs:
|
||||
genptr_free_opn(f,regtype,regid,i,tag)
|
||||
i += 1
|
||||
|
||||
f.write("}\n\n")
|
||||
|
||||
def gen_def_tcg_func(f, tag, tagregs, tagimms):
|
||||
regs = tagregs[tag]
|
||||
imms = tagimms[tag]
|
||||
|
||||
gen_tcg_func(f, tag, regs, imms)
|
||||
|
||||
def main():
|
||||
hex_common.read_semantics_file(sys.argv[1])
|
||||
hex_common.read_attribs_file(sys.argv[2])
|
||||
hex_common.read_overrides_file(sys.argv[3])
|
||||
hex_common.calculate_attribs()
|
||||
tagregs = hex_common.get_tagregs()
|
||||
tagimms = hex_common.get_tagimms()
|
||||
|
||||
with open(sys.argv[4], 'w') as f:
|
||||
f.write("#ifndef HEXAGON_TCG_FUNCS_H\n")
|
||||
f.write("#define HEXAGON_TCG_FUNCS_H\n\n")
|
||||
|
||||
for tag in hex_common.tags:
|
||||
## Skip the priv instructions
|
||||
if ( "A_PRIV" in hex_common.attribdict[tag] ) :
|
||||
continue
|
||||
## Skip the guest instructions
|
||||
if ( "A_GUEST" in hex_common.attribdict[tag] ) :
|
||||
continue
|
||||
## Skip the diag instructions
|
||||
if ( tag == "Y6_diag" ) :
|
||||
continue
|
||||
if ( tag == "Y6_diag0" ) :
|
||||
continue
|
||||
if ( tag == "Y6_diag1" ) :
|
||||
continue
|
||||
|
||||
gen_def_tcg_func(f, tag, tagregs, tagimms)
|
||||
|
||||
f.write("#endif /* HEXAGON_TCG_FUNCS_H */\n")
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
234
target/hexagon/hex_common.py
Executable file
234
target/hexagon/hex_common.py
Executable file
@ -0,0 +1,234 @@
|
||||
#!/usr/bin/env python3
|
||||
|
||||
##
|
||||
## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
##
|
||||
|
||||
import sys
|
||||
import re
|
||||
import string
|
||||
|
||||
behdict = {} # tag ->behavior
|
||||
semdict = {} # tag -> semantics
|
||||
attribdict = {} # tag -> attributes
|
||||
macros = {} # macro -> macro information...
|
||||
attribinfo = {} # Register information and misc
|
||||
tags = [] # list of all tags
|
||||
overrides = {} # tags with helper overrides
|
||||
|
||||
# We should do this as a hash for performance,
|
||||
# but to keep order let's keep it as a list.
|
||||
def uniquify(seq):
|
||||
seen = set()
|
||||
seen_add = seen.add
|
||||
return [x for x in seq if x not in seen and not seen_add(x)]
|
||||
|
||||
regre = re.compile(
|
||||
r"((?<!DUP)[MNORCPQXSGVZA])([stuvwxyzdefg]+)([.]?[LlHh]?)(\d+S?)")
|
||||
immre = re.compile(r"[#]([rRsSuUm])(\d+)(?:[:](\d+))?")
|
||||
reg_or_immre = \
|
||||
re.compile(r"(((?<!DUP)[MNRCOPQXSGVZA])([stuvwxyzdefg]+)" + \
|
||||
"([.]?[LlHh]?)(\d+S?))|([#]([rRsSuUm])(\d+)[:]?(\d+)?)")
|
||||
relimmre = re.compile(r"[#]([rR])(\d+)(?:[:](\d+))?")
|
||||
absimmre = re.compile(r"[#]([sSuUm])(\d+)(?:[:](\d+))?")
|
||||
|
||||
finished_macros = set()
|
||||
|
||||
def expand_macro_attribs(macro,allmac_re):
|
||||
if macro.key not in finished_macros:
|
||||
# Get a list of all things that might be macros
|
||||
l = allmac_re.findall(macro.beh)
|
||||
for submacro in l:
|
||||
if not submacro: continue
|
||||
if not macros[submacro]:
|
||||
raise Exception("Couldn't find macro: <%s>" % l)
|
||||
macro.attribs |= expand_macro_attribs(
|
||||
macros[submacro], allmac_re)
|
||||
finished_macros.add(macro.key)
|
||||
return macro.attribs
|
||||
|
||||
# When qemu needs an attribute that isn't in the imported files,
|
||||
# we'll add it here.
|
||||
def add_qemu_macro_attrib(name, attrib):
|
||||
macros[name].attribs.add(attrib)
|
||||
|
||||
immextre = re.compile(r'f(MUST_)?IMMEXT[(]([UuSsRr])')
|
||||
def calculate_attribs():
|
||||
add_qemu_macro_attrib('fREAD_PC', 'A_IMPLICIT_READS_PC')
|
||||
add_qemu_macro_attrib('fTRAP', 'A_IMPLICIT_READS_PC')
|
||||
add_qemu_macro_attrib('fWRITE_P0', 'A_WRITES_PRED_REG')
|
||||
add_qemu_macro_attrib('fWRITE_P1', 'A_WRITES_PRED_REG')
|
||||
add_qemu_macro_attrib('fWRITE_P2', 'A_WRITES_PRED_REG')
|
||||
add_qemu_macro_attrib('fWRITE_P3', 'A_WRITES_PRED_REG')
|
||||
|
||||
# Recurse down macros, find attributes from sub-macros
|
||||
macroValues = list(macros.values())
|
||||
allmacros_restr = "|".join(set([ m.re.pattern for m in macroValues ]))
|
||||
allmacros_re = re.compile(allmacros_restr)
|
||||
for macro in macroValues:
|
||||
expand_macro_attribs(macro,allmacros_re)
|
||||
# Append attributes to all instructions
|
||||
for tag in tags:
|
||||
for macname in allmacros_re.findall(semdict[tag]):
|
||||
if not macname: continue
|
||||
macro = macros[macname]
|
||||
attribdict[tag] |= set(macro.attribs)
|
||||
# Figure out which instructions write predicate registers
|
||||
tagregs = get_tagregs()
|
||||
for tag in tags:
|
||||
regs = tagregs[tag]
|
||||
for regtype, regid, toss, numregs in regs:
|
||||
if regtype == "P" and is_written(regid):
|
||||
attribdict[tag].add('A_WRITES_PRED_REG')
|
||||
|
||||
def SEMANTICS(tag, beh, sem):
|
||||
#print tag,beh,sem
|
||||
behdict[tag] = beh
|
||||
semdict[tag] = sem
|
||||
attribdict[tag] = set()
|
||||
tags.append(tag) # dicts have no order, this is for order
|
||||
|
||||
def ATTRIBUTES(tag, attribstring):
|
||||
attribstring = \
|
||||
attribstring.replace("ATTRIBS","").replace("(","").replace(")","")
|
||||
if not attribstring:
|
||||
return
|
||||
attribs = attribstring.split(",")
|
||||
for attrib in attribs:
|
||||
attribdict[tag].add(attrib.strip())
|
||||
|
||||
class Macro(object):
|
||||
__slots__ = ['key','name', 'beh', 'attribs', 're']
|
||||
def __init__(self, name, beh, attribs):
|
||||
self.key = name
|
||||
self.name = name
|
||||
self.beh = beh
|
||||
self.attribs = set(attribs)
|
||||
self.re = re.compile("\\b" + name + "\\b")
|
||||
|
||||
def MACROATTRIB(macname,beh,attribstring):
|
||||
attribstring = attribstring.replace("(","").replace(")","")
|
||||
if attribstring:
|
||||
attribs = attribstring.split(",")
|
||||
else:
|
||||
attribs = []
|
||||
macros[macname] = Macro(macname,beh,attribs)
|
||||
|
||||
def compute_tag_regs(tag):
|
||||
return uniquify(regre.findall(behdict[tag]))
|
||||
|
||||
def compute_tag_immediates(tag):
|
||||
return uniquify(immre.findall(behdict[tag]))
|
||||
|
||||
##
|
||||
## tagregs is the main data structure we'll use
|
||||
## tagregs[tag] will contain the registers used by an instruction
|
||||
## Within each entry, we'll use the regtype and regid fields
|
||||
## regtype can be one of the following
|
||||
## C control register
|
||||
## N new register value
|
||||
## P predicate register
|
||||
## R GPR register
|
||||
## M modifier register
|
||||
## regid can be one of the following
|
||||
## d, e destination register
|
||||
## dd destination register pair
|
||||
## s, t, u, v, w source register
|
||||
## ss, tt, uu, vv source register pair
|
||||
## x, y read-write register
|
||||
## xx, yy read-write register pair
|
||||
##
|
||||
def get_tagregs():
|
||||
return dict(zip(tags, list(map(compute_tag_regs, tags))))
|
||||
|
||||
def get_tagimms():
|
||||
return dict(zip(tags, list(map(compute_tag_immediates, tags))))
|
||||
|
||||
def is_pair(regid):
|
||||
return len(regid) == 2
|
||||
|
||||
def is_single(regid):
|
||||
return len(regid) == 1
|
||||
|
||||
def is_written(regid):
|
||||
return regid[0] in "dexy"
|
||||
|
||||
def is_writeonly(regid):
|
||||
return regid[0] in "de"
|
||||
|
||||
def is_read(regid):
|
||||
return regid[0] in "stuvwxy"
|
||||
|
||||
def is_readwrite(regid):
|
||||
return regid[0] in "xy"
|
||||
|
||||
def is_scalar_reg(regtype):
|
||||
return regtype in "RPC"
|
||||
|
||||
def is_old_val(regtype, regid, tag):
|
||||
return regtype+regid+'V' in semdict[tag]
|
||||
|
||||
def is_new_val(regtype, regid, tag):
|
||||
return regtype+regid+'N' in semdict[tag]
|
||||
|
||||
def need_slot(tag):
|
||||
if ('A_CONDEXEC' in attribdict[tag] or
|
||||
'A_STORE' in attribdict[tag] or
|
||||
'A_LOAD' in attribdict[tag]):
|
||||
return 1
|
||||
else:
|
||||
return 0
|
||||
|
||||
def need_part1(tag):
|
||||
return re.compile(r"fPART1").search(semdict[tag])
|
||||
|
||||
def need_ea(tag):
|
||||
return re.compile(r"\bEA\b").search(semdict[tag])
|
||||
|
||||
def skip_qemu_helper(tag):
|
||||
return tag in overrides.keys()
|
||||
|
||||
def imm_name(immlett):
|
||||
return "%siV" % immlett
|
||||
|
||||
def read_semantics_file(name):
|
||||
eval_line = ""
|
||||
for line in open(name, 'rt').readlines():
|
||||
if not line.startswith("#"):
|
||||
eval_line += line
|
||||
if line.endswith("\\\n"):
|
||||
eval_line.rstrip("\\\n")
|
||||
else:
|
||||
eval(eval_line.strip())
|
||||
eval_line = ""
|
||||
|
||||
def read_attribs_file(name):
|
||||
attribre = re.compile(r'DEF_ATTRIB\(([A-Za-z0-9_]+), ([^,]*), ' +
|
||||
r'"([A-Za-z0-9_\.]*)", "([A-Za-z0-9_\.]*)"\)')
|
||||
for line in open(name, 'rt').readlines():
|
||||
if not attribre.match(line):
|
||||
continue
|
||||
(attrib_base,descr,rreg,wreg) = attribre.findall(line)[0]
|
||||
attrib_base = 'A_' + attrib_base
|
||||
attribinfo[attrib_base] = {'rreg':rreg, 'wreg':wreg, 'descr':descr}
|
||||
|
||||
def read_overrides_file(name):
|
||||
overridere = re.compile("#define fGEN_TCG_([A-Za-z0-9_]+)\(.*")
|
||||
for line in open(name, 'rt').readlines():
|
||||
if not overridere.match(line):
|
||||
continue
|
||||
tag = overridere.findall(line)[0]
|
||||
overrides[tag] = True
|
||||
Loading…
Reference in New Issue
Block a user