From 793abe24aa9c6ad1a06dee091fa4dd4479fef482 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Thu, 15 Jul 2021 18:50:44 +0200 Subject: [PATCH] i2c/smbus_eeprom: Add feature bit to SPD data Add the differential clock input feature bit to the generated SPD data. Most guests don't seem to care but pegasos2 firmware version 1.2 checks for this bit and stops with unsupported module type error if it's not present. Since this feature is likely present on real memory modules add it in the general code rather than patching the generated SPD data in pegasos2 board only. Signed-off-by: BALATON Zoltan Message-Id: <19d42ade295d5297aa624a9eb757b8df18cf64d6.1626367844.git.balaton@eik.bme.hu> Acked-by: Corey Minyard Signed-off-by: David Gibson --- hw/i2c/smbus_eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index 4d2bf99207..12c5741f38 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -276,7 +276,7 @@ uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t ram_size) spd[18] = 12; /* ~CAS latencies supported */ spd[19] = (type == DDR2 ? 0 : 1); /* reserved / ~CS latencies supported */ spd[20] = 2; /* DIMM type / ~WE latencies */ - /* module features */ + spd[21] = (type < DDR2 ? 0x20 : 0); /* module features */ /* memory chip features */ spd[23] = 0x12; /* clock cycle time @ medium CAS latency */ /* data access time */