tcg/arm: Implement direct branch for goto_tb
Now that tcg can handle direct and indirect goto_tb simultaneously, we can optimistically leave space for a direct branch and fall back to loading the pointer from the TB for an indirect branch. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -135,6 +135,8 @@ typedef enum {
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ARITH_BIC = 0xe << 21,
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ARITH_MVN = 0xf << 21,
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INSN_B = 0x0a000000,
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INSN_CLZ = 0x016f0f10,
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INSN_RBIT = 0x06ff0f30,
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@ -546,7 +548,7 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
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static void tcg_out_b_imm(TCGContext *s, ARMCond cond, int32_t offset)
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{
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tcg_out32(s, (cond << 28) | 0x0a000000 |
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tcg_out32(s, (cond << 28) | INSN_B |
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(((offset - 8) >> 2) & 0x00ffffff));
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}
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@ -1941,32 +1943,52 @@ static void tcg_out_exit_tb(TCGContext *s, uintptr_t arg)
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static void tcg_out_goto_tb(TCGContext *s, int which)
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{
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/* Indirect jump method */
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intptr_t ptr, dif, dil;
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TCGReg base = TCG_REG_PC;
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uintptr_t i_addr;
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intptr_t i_disp;
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ptr = get_jmp_target_addr(s, which);
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dif = tcg_pcrel_diff(s, (void *)ptr) - 8;
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dil = sextract32(dif, 0, 12);
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if (dif != dil) {
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/* Direct branch will be patched by tb_target_set_jmp_target. */
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set_jmp_insn_offset(s, which);
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tcg_out32(s, INSN_NOP);
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/* When branch is out of range, fall through to indirect. */
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i_addr = get_jmp_target_addr(s, which);
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i_disp = tcg_pcrel_diff(s, (void *)i_addr) - 8;
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tcg_debug_assert(i_disp < 0);
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if (i_disp >= -0xfff) {
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_PC, i_disp);
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} else {
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/*
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* The TB is close, but outside the 12 bits addressable by
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* the load. We can extend this to 20 bits with a sub of a
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* shifted immediate from pc. In the vastly unlikely event
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* the code requires more than 1MB, we'll use 2 insns and
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* be no worse off.
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* shifted immediate from pc.
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*/
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base = TCG_REG_R0;
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tcg_out_movi32(s, COND_AL, base, ptr - dil);
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int h = -i_disp;
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int l = h & 0xfff;
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h = encode_imm_nofail(h - l);
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tcg_out_dat_imm(s, COND_AL, ARITH_SUB, TCG_REG_R0, TCG_REG_PC, h);
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, TCG_REG_R0, l);
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}
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tcg_out_ld32_12(s, COND_AL, TCG_REG_PC, base, dil);
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set_jmp_reset_offset(s, which);
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}
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void tb_target_set_jmp_target(const TranslationBlock *tb, int n,
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uintptr_t jmp_rx, uintptr_t jmp_rw)
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{
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/* Always indirect, nothing to do */
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uintptr_t addr = tb->jmp_target_addr[n];
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ptrdiff_t offset = addr - (jmp_rx + 8);
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tcg_insn_unit insn;
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/* Either directly branch, or fall through to indirect branch. */
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if (offset == sextract64(offset, 0, 26)) {
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/* B <addr> */
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insn = deposit32((COND_AL << 28) | INSN_B, 0, 24, offset >> 2);
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} else {
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insn = INSN_NOP;
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}
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qatomic_set((uint32_t *)jmp_rw, insn);
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flush_idcache_range(jmp_rx, jmp_rw, 4);
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}
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static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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