Added LEON MMU ASI mappings and corrected LEON3 MMU masks.

This patch adds SPARC ASI mappings that are used by the LEON processor.It also
corrects the MMU context register and context table pointer mask of the LEON3.

Signed-off-by: Ronald Hecht <ronald.hecht@gmx.de>
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Ronald Hecht 2013-02-19 12:45:06 +01:00 committed by Blue Swirl
parent 99e448006d
commit 7a0a9c2c64
2 changed files with 8 additions and 2 deletions

View File

@ -580,8 +580,8 @@ static const sparc_def_t sparc_defs[] = {
.fpu_version = 4 << 17, /* FPU version 4 (Meiko) */
.mmu_version = 0xf3000000,
.mmu_bm = 0x00000000,
.mmu_ctpr_mask = 0x007ffff0,
.mmu_cxr_mask = 0x0000003f,
.mmu_ctpr_mask = 0xfffffffc,
.mmu_cxr_mask = 0x000000ff,
.mmu_sfsr_mask = 0xffffffff,
.mmu_trcr_mask = 0xffffffff,
.nwindows = 8,

View File

@ -514,6 +514,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
#endif
break;
case 3: /* MMU probe */
case 0x18: /* LEON3 MMU probe */
{
int mmulev;
@ -528,6 +529,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
}
break;
case 4: /* read MMU regs */
case 0x19: /* LEON3 read MMU regs */
{
int reg = (addr >> 8) & 0x1f;
@ -603,6 +605,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
case 0xf: /* D-cache data */
break;
case 0x20: /* MMU passthrough */
case 0x1c: /* LEON MMU passthrough */
switch (size) {
case 1:
ret = ldub_phys(addr);
@ -844,6 +847,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
#endif
break;
case 3: /* MMU flush */
case 0x18: /* LEON3 MMU flush */
{
int mmulev;
@ -868,6 +872,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
}
break;
case 4: /* write MMU regs */
case 0x19: /* LEON3 write MMU regs */
{
int reg = (addr >> 8) & 0x1f;
uint32_t oldreg;
@ -996,6 +1001,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
}
break;
case 0x20: /* MMU passthrough */
case 0x1c: /* LEON MMU passthrough */
{
switch (size) {
case 1: