include: Include headers where needed

A number of headers neglect to include everything they need.  They
compile only if the headers they need are already included from
elsewhere.  Fix that.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20221222120813.727830-3-armbru@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Markus Armbruster 2022-12-22 13:08:11 +01:00 committed by Michael S. Tsirkin
parent f139b83717
commit 7a5951f651
43 changed files with 71 additions and 9 deletions

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@ -12,6 +12,7 @@
#ifndef QEMU_PLUGIN_GEN_H
#define QEMU_PLUGIN_GEN_H
#include "exec/cpu_ldst.h"
#include "qemu/plugin.h"
#include "tcg/tcg.h"

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@ -11,6 +11,9 @@
#ifndef HW_ACPI_ERST_H
#define HW_ACPI_ERST_H
#include "hw/acpi/bios-linker-loader.h"
#include "qom/object.h"
void build_erst(GArray *table_data, BIOSLinker *linker, Object *erst_dev,
const char *oem_id, const char *oem_table_id);

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@ -15,6 +15,7 @@
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
#include "chardev/char-fe.h"
#include "qapi/error.h"
#include "qom/object.h"
#define TYPE_CMSDK_APB_UART "cmsdk-apb-uart"

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@ -12,6 +12,7 @@
#include "qemu/fifo8.h"
#include "chardev/char-fe.h"
#include "hw/sysbus.h"
#define TYPE_GOLDFISH_TTY "goldfish_tty"
OBJECT_DECLARE_SIMPLE_TYPE(GoldfishTTYState, GOLDFISH_TTY)

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@ -17,6 +17,7 @@
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
#include "qapi/error.h"
static inline DeviceState *xilinx_uartlite_create(hwaddr addr,
qemu_irq irq,

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@ -29,6 +29,7 @@
#include "hw/cris/etraxfs_dma.h"
#include "hw/qdev-properties.h"
#include "hw/sysbus.h"
#include "qapi/error.h"
DeviceState *etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr,
struct etraxfs_dma_client *dma_out,

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@ -15,9 +15,10 @@
#include "exec/memory.h"
#include "hw/irq.h"
#include "hw/nubus/nubus.h"
#include "hw/sysbus.h"
#include "ui/console.h"
#include "qemu/timer.h"
#include "qom/object.h"
typedef enum {
MACFB_DISPLAY_APPLE_21_COLOR = 0,

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@ -23,6 +23,8 @@
#ifndef SIFIVE_PDMA_H
#define SIFIVE_PDMA_H
#include "hw/sysbus.h"
struct sifive_pdma_chan {
uint32_t control;
uint32_t next_config;

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@ -23,6 +23,7 @@
#define QEMU_IOAPIC_INTERNAL_H
#include "exec/memory.h"
#include "hw/i386/ioapic.h"
#include "hw/sysbus.h"
#include "qemu/notify.h"
#include "qom/object.h"

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@ -12,6 +12,7 @@
#ifndef QEMU_SGX_EPC_H
#define QEMU_SGX_EPC_H
#include "hw/qdev-core.h"
#include "hw/i386/hostmem-epc.h"
#define TYPE_SGX_EPC "sgx-epc"

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@ -10,6 +10,8 @@
#ifndef HW_INTC_GOLDFISH_PIC_H
#define HW_INTC_GOLDFISH_PIC_H
#include "hw/sysbus.h"
#define TYPE_GOLDFISH_PIC "goldfish_pic"
OBJECT_DECLARE_SIMPLE_TYPE(GoldfishPICState, GOLDFISH_PIC)

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@ -5,6 +5,8 @@
* Copyright (C) 2021 Loongson Technology Corporation Limited
*/
#include "hw/sysbus.h"
#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)

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@ -5,6 +5,8 @@
* Copyright (c) 2021 Loongson Technology Corporation Limited
*/
#include "hw/sysbus.h"
#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)

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@ -35,6 +35,8 @@
#ifndef HW_INTC_NIOS2_VIC_H
#define HW_INTC_NIOS2_VIC_H
#include "hw/sysbus.h"
#define TYPE_NIOS2_VIC "nios2-vic"
OBJECT_DECLARE_SIMPLE_TYPE(Nios2VIC, NIOS2_VIC)

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@ -23,6 +23,8 @@
#ifndef MCHP_PFSOC_DMC_H
#define MCHP_PFSOC_DMC_H
#include "hw/sysbus.h"
/* DDR SGMII PHY module */
#define MCHP_PFSOC_DDR_SGMII_PHY_REG_SIZE 0x1000

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@ -23,6 +23,8 @@
#ifndef MCHP_PFSOC_IOSCB_H
#define MCHP_PFSOC_IOSCB_H
#include "hw/sysbus.h"
typedef struct MchpPfSoCIoscbState {
SysBusDevice parent;
MemoryRegion container;

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@ -23,6 +23,8 @@
#ifndef MCHP_PFSOC_SYSREG_H
#define MCHP_PFSOC_SYSREG_H
#include "hw/sysbus.h"
#define MCHP_PFSOC_SYSREG_REG_SIZE 0x2000
typedef struct MchpPfSoCSysregState {

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@ -15,6 +15,7 @@
#ifndef HW_MISC_PVPANIC_H
#define HW_MISC_PVPANIC_H
#include "exec/memory.h"
#include "qom/object.h"
#define TYPE_PVPANIC_ISA_DEVICE "pvpanic"

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@ -18,7 +18,8 @@
#ifndef HW_SIFIVE_E_PRCI_H
#define HW_SIFIVE_E_PRCI_H
#include "qom/object.h"
#include "hw/sysbus.h"
enum {
SIFIVE_E_PRCI_HFROSCCFG = 0x0,

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@ -18,7 +18,8 @@
#ifndef HW_SIFIVE_U_OTP_H
#define HW_SIFIVE_U_OTP_H
#include "qom/object.h"
#include "hw/sysbus.h"
#define SIFIVE_U_OTP_PA 0x00
#define SIFIVE_U_OTP_PAIO 0x04

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@ -18,7 +18,8 @@
#ifndef HW_SIFIVE_U_PRCI_H
#define HW_SIFIVE_U_PRCI_H
#include "qom/object.h"
#include "hw/sysbus.h"
#define SIFIVE_U_PRCI_HFXOSCCFG 0x00
#define SIFIVE_U_PRCI_COREPLLCFG0 0x04

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@ -7,6 +7,8 @@
#ifndef VIRT_CTRL_H
#define VIRT_CTRL_H
#include "hw/sysbus.h"
#define TYPE_VIRT_CTRL "virt-ctrl"
OBJECT_DECLARE_SIMPLE_TYPE(VirtCtrlState, VIRT_CTRL)

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@ -54,6 +54,7 @@
#ifndef XLNX_VERSAL_PMC_IOU_SLCR_H
#define XLNX_VERSAL_PMC_IOU_SLCR_H
#include "hw/sysbus.h"
#include "hw/register.h"
#define TYPE_XILINX_VERSAL_PMC_IOU_SLCR "xlnx.versal-pmc-iou-slcr"

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@ -10,7 +10,7 @@
#include "net/net.h"
#include "hw/net/i82596.h"
#include "qom/object.h"
#include "hw/sysbus.h"
#define TYPE_LASI_82596 "lasi_82596"
typedef struct SysBusI82596State SysBusI82596State;

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@ -30,6 +30,7 @@
#ifndef XLNX_ZYNQMP_CAN_H
#define XLNX_ZYNQMP_CAN_H
#include "hw/sysbus.h"
#include "hw/register.h"
#include "net/can_emu.h"
#include "net/can_host.h"

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@ -23,7 +23,7 @@
#include "hw/sysbus.h"
#include "hw/ppc/xics.h"
#include "hw/ppc/xive.h"
#include "qom/object.h"
#include "hw/qdev-core.h"
#define TYPE_PNV_PSI "pnv-psi"
OBJECT_DECLARE_TYPE(PnvPsi, PnvPsiClass,

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@ -8,6 +8,8 @@
#ifndef RISCV_BOOT_OPENSBI_H
#define RISCV_BOOT_OPENSBI_H
#include "exec/cpu-defs.h"
/** Expected value of info magic ('OSBI' ascii string in hex) */
#define FW_DYNAMIC_INFO_MAGIC_VALUE 0x4942534f

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@ -22,13 +22,16 @@
#ifndef HW_MICROCHIP_PFSOC_H
#define HW_MICROCHIP_PFSOC_H
#include "hw/boards.h"
#include "hw/char/mchp_pfsoc_mmuart.h"
#include "hw/cpu/cluster.h"
#include "hw/dma/sifive_pdma.h"
#include "hw/misc/mchp_pfsoc_dmc.h"
#include "hw/misc/mchp_pfsoc_ioscb.h"
#include "hw/misc/mchp_pfsoc_sysreg.h"
#include "hw/net/cadence_gem.h"
#include "hw/sd/cadence_sdhci.h"
#include "hw/riscv/riscv_hart.h"
typedef struct MicrochipPFSoCState {
/*< private >*/

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@ -19,6 +19,7 @@
#ifndef RISCV_NUMA_H
#define RISCV_NUMA_H
#include "hw/boards.h"
#include "hw/sysbus.h"
#include "sysemu/numa.h"

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@ -19,6 +19,8 @@
#ifndef HW_SIFIVE_U_H
#define HW_SIFIVE_U_H
#include "hw/boards.h"
#include "hw/cpu/cluster.h"
#include "hw/dma/sifive_pdma.h"
#include "hw/net/cadence_gem.h"
#include "hw/riscv/riscv_hart.h"

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@ -19,9 +19,9 @@
#ifndef HW_RISCV_SPIKE_H
#define HW_RISCV_SPIKE_H
#include "hw/boards.h"
#include "hw/riscv/riscv_hart.h"
#include "hw/sysbus.h"
#include "qom/object.h"
#define SPIKE_CPUS_MAX 8
#define SPIKE_SOCKETS_MAX 8

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@ -19,10 +19,10 @@
#ifndef HW_RISCV_VIRT_H
#define HW_RISCV_VIRT_H
#include "hw/boards.h"
#include "hw/riscv/riscv_hart.h"
#include "hw/sysbus.h"
#include "hw/block/flash.h"
#include "qom/object.h"
#define VIRT_CPUS_MAX_BITS 9
#define VIRT_CPUS_MAX (1 << VIRT_CPUS_MAX_BITS)

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@ -22,6 +22,9 @@
#ifndef HW_SIFIVE_SPI_H
#define HW_SIFIVE_SPI_H
#include "qemu/fifo8.h"
#include "hw/sysbus.h"
#define SIFIVE_SPI_REG_NUM (0x78 / 4)
#define TYPE_SIFIVE_SPI "sifive.spi"

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@ -25,6 +25,7 @@
#define SSE_TIMER_H
#include "hw/sysbus.h"
#include "qemu/timer.h"
#include "qom/object.h"
#include "hw/timer/sse-counter.h"

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@ -26,6 +26,7 @@
#ifndef HCD_DWC3_H
#define HCD_DWC3_H
#include "hw/register.h"
#include "hw/usb/hcd-xhci.h"
#include "hw/usb/hcd-xhci-sysbus.h"

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@ -13,6 +13,8 @@
#ifndef HW_USB_HCD_MUSB_H
#define HW_USB_HCD_MUSB_H
#include "exec/hwaddr.h"
enum musb_irq_source_e {
musb_irq_suspend = 0,
musb_irq_resume,

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@ -25,6 +25,8 @@
#ifndef XLNX_USB_SUBSYSTEM_H
#define XLNX_USB_SUBSYSTEM_H
#include "hw/register.h"
#include "hw/sysbus.h"
#include "hw/usb/xlnx-versal-usb2-ctrl-regs.h"
#include "hw/usb/hcd-dwc3.h"

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@ -26,6 +26,9 @@
#ifndef XLNX_VERSAL_USB2_CTRL_REGS_H
#define XLNX_VERSAL_USB2_CTRL_REGS_H
#include "hw/register.h"
#include "hw/sysbus.h"
#define TYPE_XILINX_VERSAL_USB2_CTRL_REGS "xlnx.versal-usb2-ctrl-regs"
#define XILINX_VERSAL_USB2_CTRL_REGS(obj) \

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@ -22,8 +22,8 @@
#ifndef HW_VIRTIO_MMIO_H
#define HW_VIRTIO_MMIO_H
#include "hw/sysbus.h"
#include "hw/virtio/virtio-bus.h"
#include "qom/object.h"
/* QOM macros */
/* virtio-mmio-bus */

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@ -9,6 +9,9 @@
#ifndef PLUGIN_MEMORY_H
#define PLUGIN_MEMORY_H
#include "exec/cpu-defs.h"
#include "exec/hwaddr.h"
struct qemu_plugin_hwaddr {
bool is_io;
bool is_store;

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@ -13,6 +13,8 @@
#ifndef QEMU_DIRTYRATE_H
#define QEMU_DIRTYRATE_H
#include "qapi/qapi-types-migration.h"
typedef struct VcpuStat {
int nvcpu; /* number of vcpu */
DirtyRateVcpu *rates; /* array of dirty rate for each vcpu */

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@ -15,6 +15,7 @@
#define DUMP_H
#include "qapi/qapi-types-dump.h"
#include "qemu/thread.h"
#define MAKEDUMPFILE_SIGNATURE "makedumpfile"
#define MAX_SIZE_MDF_HEADER (4096) /* max size of makedumpfile_header */

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@ -10,6 +10,7 @@
#ifndef SYSCALL_TRACE_H
#define SYSCALL_TRACE_H
#include "exec/user/abitypes.h"
#include "trace/trace-root.h"
/*